diff options
| author | Mary Ruthven <mruthven@chromium.org> | 2016-06-30 12:54:18 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-07-11 10:23:10 -0700 |
| commit | 9a710bd340f12db0334e08bc46cb2228f42ff956 (patch) | |
| tree | b803bfeafcd79807df2f0aab797347a1bdcce260 /chip | |
| parent | 51b24ef2325b04f769a41c0ee197ef93d45cc8e2 (diff) | |
| download | chrome-ec-9a710bd340f12db0334e08bc46cb2228f42ff956.tar.gz | |
cr50: disable UART0 RX
If the UART0 RX pad is not pulled up, cr50 will get held up on all of
the interrupts triggered by the low signal. This causes cr50 to reboot
continuously. UART0 RX was moved to DIOA13, which does not have an
internal pull up. This means we have to rely on an external pull up.
Because not having an external pull up on DIOA13 could prevent the
system from booting and UART0 RX is only used as an alternate debugging
mechanism from suzyq, we decided it is best for UART0 RX to be disabled
by default.
BUG=none
BRANCH=none
TEST=Connect UART1_RX to DIOA1 and test that it still accepts input.
Disconnect it from any pads. Verify the system boots normally and
console input from DIOA1 no longer works but the suzyq shell still does.
Change-Id: I68988c59cfce610cc6c360bf8dd9685e98ab12ff
Reviewed-on: https://chromium-review.googlesource.com/357881
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/g/uartn.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/chip/g/uartn.c b/chip/g/uartn.c index 17cd5e51b8..cda77c819d 100644 --- a/chip/g/uartn.c +++ b/chip/g/uartn.c @@ -116,8 +116,12 @@ void uartn_enable_interrupt(int uart) /* Enable TX and RX. Disable HW flow control and loopback */ void uartn_enable(int uart) { - /* TX and RX enable */ - GR_UART_CTRL(uart) = 0x03; + /* Enable UART TX */ + GR_UART_CTRL(uart) = 0x01; + + /* Enable UART RX if it is connected to an external pad */ + if (DIO_SEL_REG(GC_PINMUX_UART0_RX_SEL_OFFSET + (uart * 16))) + GR_UART_CTRL(uart) |= 0x02; } /* Disable TX, RX, HW flow control, and loopback */ |