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authorRandall Spangler <rspangler@chromium.org>2013-07-03 13:44:01 -0700
committerChromeBot <chrome-bot@google.com>2013-07-10 11:16:43 -0700
commit6b46a0cfc5f26fef296feb3ded61762f1760fc49 (patch)
tree7872a98f62b8d0c3039db1408e59b9de1c4e1901 /chip
parentee4eedf29e8636c3f45333d0c3794356fc545ae6 (diff)
downloadchrome-ec-6b46a0cfc5f26fef296feb3ded61762f1760fc49.tar.gz
Refactor x86 chipset code
This moves most of the code into a common module, leaving only the board-specific GPIOs (now listed in a struct in board.c) and the chipset-specific state machine with multiple copies. BUG=chrome-os-partner:18343 BRANCH=none TEST=boot link; verify suspend and resume work; shut back down and see it go to G3 after 10 sec. Change-Id: Iafa8ba55a4870bb0119ff4161a1a9054fcc7955f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/60949
Diffstat (limited to 'chip')
-rw-r--r--chip/lm4/switch.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/chip/lm4/switch.c b/chip/lm4/switch.c
index 168b57eb7c..a70a163dbb 100644
--- a/chip/lm4/switch.c
+++ b/chip/lm4/switch.c
@@ -409,6 +409,7 @@ static void switch_init(void)
*host_get_memmap(EC_MEMMAP_SWITCHES_VERSION) = 1;
/* Enable interrupts, now that we've initialized */
+ gpio_enable_interrupt(GPIO_PCH_BKLTEN);
gpio_enable_interrupt(GPIO_POWER_BUTTON_L);
gpio_enable_interrupt(GPIO_RECOVERY_L);
#ifdef CONFIG_WP_ACTIVE_HIGH