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authorRandall Spangler <rspangler@chromium.org>2013-06-24 14:22:03 -0700
committerChromeBot <chrome-bot@google.com>2013-06-26 09:08:23 -0700
commit8e72f58ac4dd7a19069a58cde3ab1e91e8874091 (patch)
treeeb459655af25b905199e031f3dfeed92349199ff /chip
parent67c275f849939dfa9993175f1704cb80b11a40b3 (diff)
downloadchrome-ec-8e72f58ac4dd7a19069a58cde3ab1e91e8874091.tar.gz
pit: Clean up timer init code
Power LED PWM now uses the same functions as the hardware timer. BUG=chrome-os-partner:20414 BRANCH=none TEST=Suspend system. Power button LED pulses smoothly still. Change-Id: Ib5ca6655d815462baaf68600ad14c4c0c680a6af Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/59838
Diffstat (limited to 'chip')
-rw-r--r--chip/stm32/hwtimer.c41
-rw-r--r--chip/stm32/power_led.c39
2 files changed, 51 insertions, 29 deletions
diff --git a/chip/stm32/hwtimer.c b/chip/stm32/hwtimer.c
index 059814de8a..8067843734 100644
--- a/chip/stm32/hwtimer.c
+++ b/chip/stm32/hwtimer.c
@@ -160,14 +160,35 @@ static void __hw_clock_source_irq(void)
DECLARE_IRQ(IRQ_MSB, __hw_clock_source_irq, 1);
DECLARE_IRQ(IRQ_LSB, __hw_clock_source_irq, 1);
-void __hw_timer_enable_clock(int n)
+void __hw_timer_enable_clock(int n, int enable)
{
- if (n == 1) /* STM32F only */
- STM32_RCC_APB2ENR |= 1 << 11;
- else if (n >= 2 && n <= 7)
- STM32_RCC_APB1ENR |= 1 << (n - 2);
- else if (n >= 9 && n <= 11) /* STM32L only */
- STM32_RCC_APB2ENR |= 1 << (n - 7);
+ volatile uint32_t *reg;
+ uint32_t mask = 0;
+
+#if defined(CHIP_VARIANT_stm32f100) || defined(CHIP_VARIANT_stm32f10x)
+ if (n == 1) {
+ reg = &STM32_RCC_APB2ENR;
+ mask = 1 << 11;
+ }
+#elif defined(CHIP_VARIANT_stm32l15x)
+ if (n >= 9 && n <= 11) {
+ reg = &STM32_RCC_APB2ENR;
+ mask = 1 << (n - 7);
+ }
+#endif
+
+ if (n >= 2 && n <= 7) {
+ reg = &STM32_RCC_APB1ENR;
+ mask = 1 << (n - 2);
+ }
+
+ if (!mask)
+ return;
+
+ if (enable)
+ *reg |= mask;
+ else
+ *reg &= ~mask;
}
static void update_prescaler(void)
@@ -194,8 +215,8 @@ int __hw_clock_source_init(uint32_t start_t)
*/
/* Enable TIM_CLOCK_MSB and TIM_CLOCK_LSB clocks */
- __hw_timer_enable_clock(TIM_CLOCK_MSB);
- __hw_timer_enable_clock(TIM_CLOCK_LSB);
+ __hw_timer_enable_clock(TIM_CLOCK_MSB, 1);
+ __hw_timer_enable_clock(TIM_CLOCK_LSB, 1);
/*
* Timer configuration : Upcounter, counter disabled, update event only
@@ -280,7 +301,7 @@ void hwtimer_setup_watchdog(void)
struct timer_ctlr *timer = (struct timer_ctlr *)TIM_WD_BASE;
/* Enable clock */
- __hw_timer_enable_clock(TIM_WATCHDOG);
+ __hw_timer_enable_clock(TIM_WATCHDOG, 1);
/*
* Timer configuration : Down counter, counter disabled, update
diff --git a/chip/stm32/power_led.c b/chip/stm32/power_led.c
index c4773d37b8..5c4a92c86f 100644
--- a/chip/stm32/power_led.c
+++ b/chip/stm32/power_led.c
@@ -6,8 +6,8 @@
/*
* Keyboard power button LED state machine.
*
- * This sets up TIM2 to drive the power button LED so that the duty cycle
- * can range from 0-100%. When the lid is closed or turned off, then the
+ * This sets up TIM_POWER_LED to drive the power button LED so that the duty
+ * cycle can range from 0-100%. When the lid is closed or turned off, then the
* PWM is disabled and the GPIO is reconfigured to minimize leakage voltage.
*
* In suspend mode, duty cycle transitions progressively slower from 0%
@@ -19,6 +19,7 @@
#include "console.h"
#include "gpio.h"
#include "hooks.h"
+#include "hwtimer.h"
#include "power_led.h"
#include "registers.h"
#include "task.h"
@@ -49,9 +50,9 @@ static void power_led_set_duty(int percent)
* ARR=100, this is just percent.
*/
#ifdef BOARD_pit
- STM32_TIM_CCR3(2) = percent;
+ STM32_TIM_CCR3(TIM_POWER_LED) = percent;
#else
- STM32_TIM_CCR2(2) = percent;
+ STM32_TIM_CCR2(TIM_POWER_LED) = percent;
#endif
}
@@ -68,11 +69,11 @@ static void power_led_use_pwm(void)
STM32_GPIO_CRL(GPIO_B) = val;
#endif
- /* Enable TIM2 clock */
- STM32_RCC_APB1ENR |= 0x1;
+ /* Enable timer */
+ __hw_timer_enable_clock(TIM_POWER_LED, 1);
/* Disable counter during setup */
- STM32_TIM_CR1(2) = 0x0000;
+ STM32_TIM_CR1(TIM_POWER_LED) = 0x0000;
/*
* CPU clock / PSC determines how fast the counter operates.
@@ -81,41 +82,41 @@ static void power_led_use_pwm(void)
*
* frequency = cpu_freq / (cpu_freq/10000) / 100 = 100 Hz.
*/
- STM32_TIM_PSC(2) = clock_get_freq() / 10000; /* pre-scaler */
- STM32_TIM_ARR(2) = 100; /* auto-reload value */
+ STM32_TIM_PSC(TIM_POWER_LED) = clock_get_freq() / 10000;
+ STM32_TIM_ARR(TIM_POWER_LED) = 100;
power_led_set_duty(100);
#ifdef BOARD_pit
/* CC3 configured as output, PWM mode 1, preload enable */
- STM32_TIM_CCMR2(2) = (6 << 4) | (1 << 3);
+ STM32_TIM_CCMR2(TIM_POWER_LED) = (6 << 4) | (1 << 3);
/* CC3 output enable, active low */
- STM32_TIM_CCER(2) = (1 << 8) | (1 << 9);
+ STM32_TIM_CCER(TIM_POWER_LED) = (1 << 8) | (1 << 9);
#else
/* CC2 configured as output, PWM mode 1, preload enable */
- STM32_TIM_CCMR1(2) = (6 << 12) | (1 << 11);
+ STM32_TIM_CCMR1(TIM_POWER_LED) = (6 << 12) | (1 << 11);
/* CC2 output enable, active low */
- STM32_TIM_CCER(2) = (1 << 4) | (1 << 5);
+ STM32_TIM_CCER(TIM_POWER_LED) = (1 << 4) | (1 << 5);
#endif
/* Generate update event to force loading of shadow registers */
- STM32_TIM_EGR(2) |= 1;
+ STM32_TIM_EGR(TIM_POWER_LED) |= 1;
/* Enable auto-reload preload, start counting */
- STM32_TIM_CR1(2) |= (1 << 7) | (1 << 0);
+ STM32_TIM_CR1(TIM_POWER_LED) |= (1 << 7) | (1 << 0);
using_pwm = 1;
}
static void power_led_manual_off(void)
{
- /* disable counter */
- STM32_TIM_CR1(2) &= ~0x1;
+ /* Disable counter */
+ STM32_TIM_CR1(TIM_POWER_LED) &= ~0x1;
- /* disable TIM2 clock */
- STM32_RCC_APB1ENR &= ~0x1;
+ /* Disable timer clock */
+ __hw_timer_enable_clock(TIM_POWER_LED, 0);
/*
* Reconfigure GPIO as a floating input. Alternatively we could