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authorNick Sanders <nsanders@chromium.org>2017-05-15 17:42:41 -0700
committerchrome-bot <chrome-bot@chromium.org>2017-05-25 00:14:07 -0700
commit81b2654dc92b04750c2aa25e3ed9fed143c8d396 (patch)
treeba9c756f7c1a550f0528168da958d49bca9227a6 /chip
parentc78562ff602bd3026c02267650c020d61c87cee2 (diff)
downloadchrome-ec-81b2654dc92b04750c2aa25e3ed9fed143c8d396.tar.gz
mn50: socket controls
Add console and usb_spi commands to enable or disable IOs to the socket, so that it will not be powered if a chip is inserted, and control reset and boot_cfg. BUG=b:36910757 BRANCH=None TEST=Check no voltage when socket is disabled. Full spiflash compatibility. Change-Id: Ie4ce0613a868030833abfdccd827acce2753dc6f Reviewed-on: https://chromium-review.googlesource.com/509072 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r--chip/g/usb_spi.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/chip/g/usb_spi.h b/chip/g/usb_spi.h
index bdd4fbcd24..2240999950 100644
--- a/chip/g/usb_spi.h
+++ b/chip/g/usb_spi.h
@@ -67,6 +67,9 @@ enum usb_spi_request {
USB_SPI_REQ_ENABLE_AP = 0x0002,
USB_SPI_REQ_ENABLE_EC = 0x0003,
USB_SPI_REQ_ENABLE_H1 = 0x0004,
+ USB_SPI_REQ_RESET = 0x0005,
+ USB_SPI_REQ_BOOT_CFG = 0x0006,
+ USB_SPI_REQ_SOCKET = 0x0007,
};
/* USB SPI device indexes */