diff options
| author | Kyoung Kim <kyoung.il.kim@intel.com> | 2016-11-09 12:11:56 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-11-11 00:12:33 -0800 |
| commit | fa1cec0b604e058a03d28fef9c9e10574976a54a (patch) | |
| tree | 2446d99fe64b4434d0681d5ac690689caa7518ab /chip | |
| parent | 31df657df86a7b8c9a1be602343c52e4a5815dc3 (diff) | |
| download | chrome-ec-fa1cec0b604e058a03d28fef9c9e10574976a54a.tar.gz | |
ISH: fix UART reference clock
UART reference clock is 100KHz for ISH4 and 120MHz for ISH3
BUG=none
BRANCH=None
TEST=`make buildall -j`
Change-Id: Ie33e0bd33e0a0c8e56a58fcf4a48677d38c9d61e
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/409594
Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/ish/uart_defs.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/chip/ish/uart_defs.h b/chip/ish/uart_defs.h index 8c431e21a8..9890faeb7c 100644 --- a/chip/ish/uart_defs.h +++ b/chip/ish/uart_defs.h @@ -185,7 +185,11 @@ /* KHZ, MHZ */ #define KHZ(x) ((x) * 1000) #define MHZ(x) (KHZ(x) * 1000) +#if (defined CONFIG_ISH_30 || defined CONFIG_ISH_20) #define UART_ISH_INPUT_FREQ MHZ(120) +#elif defined CONFIG_ISH_40 +#define UART_ISH_INPUT_FREQ MHZ(100) +#endif #define UART_DEFAULT_BAUD_RATE 115200 #define UART_STATE_CG (1 << UART_OP_CG) |