summaryrefslogtreecommitdiff
path: root/chip
diff options
context:
space:
mode:
authorEdward Hill <ecgh@chromium.org>2018-01-22 12:46:36 -0700
committerchrome-bot <chrome-bot@chromium.org>2018-09-04 16:53:49 -0700
commit6b28dab8239564dd8024abf36b22dcb4b179c113 (patch)
treedf804dc3b6f31b8962a1a9fa7bbd5b145609c7e9 /chip
parent571eb5939ef2f353cc16d725c3ce33100eab60ec (diff)
downloadchrome-ec-6b28dab8239564dd8024abf36b22dcb4b179c113.tar.gz
Add CONFIG_GPIO_INIT_POWER_ON_DELAY_MS
On power on, H1 releases the EC from reset but then quickly asserts and releases the reset a second time (so that the EC comes out of reset the second time after the SPI buffers have been configured by H1). Add a delay so the EC can wait for this second reset before configuring GPIO outputs, to avoid extra output toggles. Unfortunate the timer is not set up by the time gpio_pre_init() is called, so we add a new __hw_early_init_hwtimer() function to set it up so that mdelay() worked. Without that, mdelay() hangs. BUG=b:72132384 BRANCH=none TEST=GPIO_OUT_HIGH has a single rising edge after power on (before it would rise-fall-rise) Check that mdelay(10) delays for about 10ms (actually perhaps a little more using a scope line on KB_BL_EN Change-Id: Iadc96fceb190e43ac0758f291f22e03aef81c379 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/879353 Commit-Ready: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r--chip/npcx/gpio.c18
-rw-r--r--chip/npcx/hwtimer.c14
-rw-r--r--chip/npcx/hwtimer_chip.h7
3 files changed, 36 insertions, 3 deletions
diff --git a/chip/npcx/gpio.c b/chip/npcx/gpio.c
index cabda69b15..7be79f4e54 100644
--- a/chip/npcx/gpio.c
+++ b/chip/npcx/gpio.c
@@ -22,6 +22,7 @@
#include "lpc_chip.h"
#include "ec_commands.h"
#include "host_command.h"
+#include "hwtimer_chip.h"
#if !(DEBUG_GPIO)
#define CPUTS(...)
@@ -402,6 +403,23 @@ void gpio_pre_init(void)
system_check_bbram_on_reset();
is_warm = system_is_reboot_warm();
+#ifdef CONFIG_GPIO_INIT_POWER_ON_DELAY_MS
+ /*
+ * On power-on of some boards, H1 releases the EC from reset but then
+ * quickly asserts and releases the reset a second time. This means the
+ * EC sees 2 resets: (1) power-on reset, (2) reset-pin reset. If we add
+ * a delay between reset (1) and configuring GPIO output levels, then
+ * reset (2) will happen before the end of the delay so we avoid extra
+ * output toggles.
+ *
+ * Make sure to set up the timer before using udelay().
+ */
+ if (system_get_reset_flags() & RESET_FLAG_POWER_ON) {
+ __hw_early_init_hwtimer(0);
+ udelay(CONFIG_GPIO_INIT_POWER_ON_DELAY_MS * MSEC);
+ }
+#endif
+
#ifdef CHIP_FAMILY_NPCX7
/*
* TODO: Set bit 7 of DEVCNT again for npcx7 series. Please see Errata
diff --git a/chip/npcx/hwtimer.c b/chip/npcx/hwtimer.c
index e46a56fb1e..38a8fce548 100644
--- a/chip/npcx/hwtimer.c
+++ b/chip/npcx/hwtimer.c
@@ -303,7 +303,7 @@ static void update_prescaler(void)
}
DECLARE_HOOK(HOOK_FREQ_CHANGE, update_prescaler, HOOK_PRIO_DEFAULT);
-int __hw_clock_source_init(uint32_t start_t)
+void __hw_early_init_hwtimer(uint32_t start_t)
{
/*
* 1. Use ITIM16-1 as internal time reading
@@ -321,11 +321,19 @@ int __hw_clock_source_init(uint32_t start_t)
/* Set initial prescaler */
update_prescaler();
+ hw_clock_source_set_preload(start_t, 1);
+}
+
+/* Note that early_init_hwtimer() has already executed by this point */
+int __hw_clock_source_init(uint32_t start_t)
+{
/*
* Override the count with the start value now that counting has
- * started.
+ * started. Note that we may have already called this function from
+ * gpio_pre_init(), but only in the case where we expected a reset, so
+ * we should not get here in that case.
*/
- hw_clock_source_set_preload(start_t, 1);
+ __hw_early_init_hwtimer(start_t);
/* Enable interrupt of ITIM */
task_enable_irq(NPCX_IRQ_ITIM32);
diff --git a/chip/npcx/hwtimer_chip.h b/chip/npcx/hwtimer_chip.h
index 3b00b0dea5..d5939f77a8 100644
--- a/chip/npcx/hwtimer_chip.h
+++ b/chip/npcx/hwtimer_chip.h
@@ -35,4 +35,11 @@ uint32_t __hw_clock_get_sleep_time(uint16_t pre_evt_cnt);
/* Handle ITIM32 overflow if interrupt is disabled */
void __hw_clock_handle_overflow(uint32_t clksrc_high);
+/**
+ * Set up the timer for use before the task system is available
+ *
+ * @param start_t Value to assign to the counter
+ */
+void __hw_early_init_hwtimer(uint32_t start_t);
+
#endif /* __CROS_EC_HWTIMER_CHIP_H */