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| author | Randall Spangler <rspangler@chromium.org> | 2012-05-11 12:26:49 -0700 |
|---|---|---|
| committer | Randall Spangler <rspangler@chromium.org> | 2012-05-11 13:36:34 -0700 |
| commit | 27e8bdb7c099ff4642c5c1d567029467da35da4f (patch) | |
| tree | a22aa72b80161b73341bb633cee1157597e0b453 /chip | |
| parent | 2f2a5d90224a1a408c6eca408e4d6e87f0fa0503 (diff) | |
| download | chrome-ec-27e8bdb7c099ff4642c5c1d567029467da35da4f.tar.gz | |
Maintain timer value across sysjumps and clean up init debug output
This helps us keep track of how long vboot is taking on the EC.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:9651
TEST=reboot system and look at debug log. time shouldn't start over after it jumps to image A.
Change-Id: Iad86e90d42dabf1c67b2c2be80dda1151cf9a288
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/lm4/hwtimer.c | 7 | ||||
| -rw-r--r-- | chip/stm32/hwtimer.c | 7 |
2 files changed, 11 insertions, 3 deletions
diff --git a/chip/lm4/hwtimer.c b/chip/lm4/hwtimer.c index 41e737b10d..b3c8498294 100644 --- a/chip/lm4/hwtimer.c +++ b/chip/lm4/hwtimer.c @@ -69,7 +69,7 @@ static int update_prescaler(void) DECLARE_HOOK(HOOK_FREQ_CHANGE, update_prescaler, HOOK_PRIO_DEFAULT); -int __hw_clock_source_init(void) +int __hw_clock_source_init(uint32_t start_t) { volatile uint32_t scratch __attribute__((unused)); @@ -93,10 +93,13 @@ int __hw_clock_source_init(void) /* Periodic mode, counting down */ LM4_TIMER_TAMR(6) = 0x22; - /* use the full 32-bits of the timer */ + /* Use the full 32-bits of the timer */ LM4_TIMER_TAILR(6) = 0xffffffff; /* Starts counting in timer A */ LM4_TIMER_CTL(6) |= 0x1; + /* Override the count with the start value now that counting has + * started. */ + LM4_TIMER_TAV(6) = 0xffffffff - start_t; /* Enable interrupt */ task_enable_irq(LM4_IRQ_TIMERW0A); diff --git a/chip/stm32/hwtimer.c b/chip/stm32/hwtimer.c index 9576a6fb46..0d0417274f 100644 --- a/chip/stm32/hwtimer.c +++ b/chip/stm32/hwtimer.c @@ -90,7 +90,7 @@ static void __hw_clock_source_irq(void) DECLARE_IRQ(STM32_IRQ_TIM2, __hw_clock_source_irq, 1); DECLARE_IRQ(STM32_IRQ_TIM3, __hw_clock_source_irq, 1); -int __hw_clock_source_init(void) +int __hw_clock_source_init(uint32_t start_t) { /* * we use 2 chained 16-bit counters to emulate a 32-bit one : @@ -134,6 +134,11 @@ int __hw_clock_source_init(void) STM32_TIM_CR1(2) |= 1; STM32_TIM_CR1(3) |= 1; + /* Override the count with the start value now that counting has + * started. */ + STM32_TIM_CNT(2) = start_t >> 16; + STM32_TIM_CNT(3) = start_t & 0xffff; + /* Enable timer interrupts */ task_enable_irq(STM32_IRQ_TIM2); task_enable_irq(STM32_IRQ_TIM3); |