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| author | Mary Ruthven <mruthven@chromium.org> | 2021-01-05 18:55:58 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-01-10 06:34:22 +0000 |
| commit | 7ec65cc8dc598f7bb0178b78d7be06a8478e3e2e (patch) | |
| tree | a684e8c7b0617378e868ab4790301b64bc59120d /chip | |
| parent | b3e23b9e85b5c547a6ab13a0935a3ae72a5e7f74 (diff) | |
| download | chrome-ec-7ec65cc8dc598f7bb0178b78d7be06a8478e3e2e.tar.gz | |
coil: CONFIG_SPS->CONFIG_SPP
BUG=b:175244613
TEST=make buildall -j
Change-Id: I79a65f8475e2a764720a1f37a147c3723d34b046
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2615120
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/g/build.mk | 2 | ||||
| -rw-r--r-- | chip/g/sps.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/chip/g/build.mk b/chip/g/build.mk index 99e35568ce..c52e51cab3 100644 --- a/chip/g/build.mk +++ b/chip/g/build.mk @@ -70,7 +70,7 @@ chip-$(CONFIG_CCD_ITE_PROGRAMMING)+= ite_sync.o chip-$(CONFIG_ENABLE_H1_ALERTS)+= alerts.o chip-$(CONFIG_USB_FW_UPDATE)+= usb_upgrade.o chip-$(CONFIG_NON_HC_FW_UPDATE)+= upgrade_fw.o post_reset.o upgrade.o -chip-$(CONFIG_SPS)+= sps.o +chip-$(CONFIG_SPP)+= sps.o chip-$(CONFIG_TPM_SPS)+=sps_tpm.o chip-$(CONFIG_WATCHDOG)+=watchdog.o diff --git a/chip/g/sps.c b/chip/g/sps.c index 78d3a01570..0e4888a946 100644 --- a/chip/g/sps.c +++ b/chip/g/sps.c @@ -457,7 +457,7 @@ void sps0_cs_assert_interrupt_(void) } DECLARE_IRQ(GC_IRQNUM_SPS0_CS_ASSERT_INTR, sps0_cs_assert_interrupt_, 1); -#ifdef CONFIG_SPS_TEST +#ifdef CONFIG_SPP_TEST /* Function to test SPS driver. It expects the host to send SPI frames of size * <size> (not exceeding 1100) of the following format: @@ -613,4 +613,4 @@ static int command_sps(int argc, char **argv) DECLARE_CONSOLE_COMMAND(spstest, command_sps, "<num of frames>", "Loop back frames (10 by default) back to the host"); -#endif /* CONFIG_SPS_TEST */ +#endif /* CONFIG_SPP_TEST */ |