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| author | Daisuke Nojiri <dnojiri@chromium.org> | 2017-06-29 16:03:04 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-07-13 19:45:57 -0700 |
| commit | 34fed775b65063fb519d11deb11eb1feac7a8ecc (patch) | |
| tree | c5a505368025900931fa35eb0adeb95eef182a2d /common/firmware_image.lds.S | |
| parent | 1106dea40d3b18fbab2f42a2510d0a7899650db9 (diff) | |
| download | chrome-ec-34fed775b65063fb519d11deb11eb1feac7a8ecc.tar.gz | |
npcx: Build RW_B and support sysjump to it
This patch allows a board to include another RW image in ec.bin.
The size of each copy is a quarter of the flash size on Fizz.
BUG=b:38462249
BRANCH=none
CQ-DEPEND=CL:568297
TEST=Run sysjump RW/A/B. Verify there is no size change by running
make savesizes/newsizes. Run objdump -h build/fizz/ec.obj:
Idx Name Size VMA LMA File off Algn
0 .image.RO 0001700c 10088000 10088000 00008000 2**0
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .image.RO.key 00000340 1009f00c 100a7c40 0001f00c 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
2 .image.RW 00016ddc 1009f34c 100c8000 0001f34c 2**0
CONTENTS, ALLOC, LOAD, READONLY, CODE
3 .image.RW.sign 000001b8 100b6128 100e7c00 00036128 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
4 .image.RW_B 00016ddc 100b62e0 100e8000 000362e0 2**0
CONTENTS, ALLOC, LOAD, READONLY, CODE
5 .image.RW_B.sign 000001b8 100cd0bc 10107c00 0004d0bc 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
6 .padding 00000001 100cd274 10107fff 0004d274 2**0
CONTENTS, ALLOC, LOAD, DATA
7 .ARM.attributes 00000014 00000000 00000000 0004d275 2**0
CONTENTS, READONLY
Change-Id: Iaa687c1d7d704fec4cccfa127376c8db102267fa
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/557305
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Diffstat (limited to 'common/firmware_image.lds.S')
| -rw-r--r-- | common/firmware_image.lds.S | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/common/firmware_image.lds.S b/common/firmware_image.lds.S index a956683aa6..8e82dcf1de 100644 --- a/common/firmware_image.lds.S +++ b/common/firmware_image.lds.S @@ -15,6 +15,9 @@ #define IMAGE_RW_AT (CONFIG_PROGRAM_MEMORY_BASE + \ CONFIG_EC_WRITABLE_STORAGE_OFF + \ CONFIG_RW_STORAGE_OFF) +#define IMAGE_RW_B_AT (CONFIG_PROGRAM_MEMORY_BASE + \ + CONFIG_EC_WRITABLE_STORAGE_OFF + \ + CONFIG_RW_B_STORAGE_OFF) #elif (CONFIG_RO_MEM_OFF == CONFIG_RW_MEM_OFF) #define IMAGE_RO_AT (CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF) @@ -23,10 +26,13 @@ mapped to the same location but we still have to generate an ec.bin with RO and RW images at different Flash offset */ #define IMAGE_RW_AT (CONFIG_PROGRAM_MEMORY_BASE + \ CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE) +#define IMAGE_RW_B_AT (CONFIG_PROGRAM_MEMORY_BASE + \ + CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE + CONFIG_RW_SIZE) #else #define IMAGE_RO_AT (CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF) #define IMAGE_RW_AT (CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RW_MEM_OFF) +#define IMAGE_RW_B_AT (CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RW_B_MEM_OFF) #endif OUTPUT_FORMAT(BFD_FORMAT, BFD_FORMAT, BFD_FORMAT) @@ -69,9 +75,14 @@ SECTIONS } > FLASH =0xff #endif #ifdef CONFIG_RW_B_MEM_OFF - .image.RW_B : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RW_B_MEM_OFF) { + .image.RW_B : AT(IMAGE_RW_B_AT) { *(.image.RW_B) } > FLASH =0xff +#ifdef CONFIG_RWSIG_TYPE_RWSIG + .image.RW_B.sign : AT(CONFIG_RW_B_SIG_ADDR) { + *(.image.RW_B.sign) + } > FLASH =0xff +#endif #endif .padding : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_FLASH_SIZE - 1) { BYTE(0xff); |