diff options
author | Daisuke Nojiri <dnojiri@chromium.org> | 2017-07-11 09:28:08 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2017-07-12 09:31:58 -0700 |
commit | bd8536454210b712637aa25bf76decb6a24b3685 (patch) | |
tree | 3ecf81f059e730f6916d13c1dc7309ebf15b74e5 /common/firmware_image.lds.S | |
parent | a9c26a97ef3910e4a12434519be6b29763475f8b (diff) | |
download | chrome-ec-bd8536454210b712637aa25bf76decb6a24b3685.tar.gz |
Define load addresses using macros
This patch defines load addresses of regions using macros to increase
readability.
BUG=none
BRANCH=none
TEST=Diff firmware_image.lds before and after the change.
Change-Id: I24a13f4676b194efb748522f03c3134d1568f5ae
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/566940
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Diffstat (limited to 'common/firmware_image.lds.S')
-rw-r--r-- | common/firmware_image.lds.S | 46 |
1 files changed, 25 insertions, 21 deletions
diff --git a/common/firmware_image.lds.S b/common/firmware_image.lds.S index fe41992df9..a956683aa6 100644 --- a/common/firmware_image.lds.S +++ b/common/firmware_image.lds.S @@ -6,6 +6,29 @@ #include "config.h" #include "rwsig.h" +#ifdef NPCX_RO_HEADER +/* Replace *_MEM_OFF with *_STORAGE_OFF to indicate flat file contains header + * or some struture which doesn't belong to FW */ +#define IMAGE_RO_AT (CONFIG_PROGRAM_MEMORY_BASE + \ + CONFIG_EC_PROTECTED_STORAGE_OFF) +/* npcx uses *STORAGE_OFF to plan the layout of flash image */ +#define IMAGE_RW_AT (CONFIG_PROGRAM_MEMORY_BASE + \ + CONFIG_EC_WRITABLE_STORAGE_OFF + \ + CONFIG_RW_STORAGE_OFF) + +#elif (CONFIG_RO_MEM_OFF == CONFIG_RW_MEM_OFF) +#define IMAGE_RO_AT (CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF) +/* This is applicable to ECs in which RO and RW execution is +mapped to the same location but we still have to generate an ec.bin with RO +and RW images at different Flash offset */ +#define IMAGE_RW_AT (CONFIG_PROGRAM_MEMORY_BASE + \ + CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE) + +#else +#define IMAGE_RO_AT (CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF) +#define IMAGE_RW_AT (CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RW_MEM_OFF) +#endif + OUTPUT_FORMAT(BFD_FORMAT, BFD_FORMAT, BFD_FORMAT) OUTPUT_ARCH(BFD_ARCH) MEMORY @@ -14,14 +37,7 @@ MEMORY } SECTIONS { -#if defined(NPCX_RO_HEADER) -/* Replace *_MEM_OFF with *_STORAGE_OFF to indicate flat file contains header - * or some struture which doesn't belong to FW */ - .image.RO : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_EC_PROTECTED_STORAGE_OFF\ - ) { -#else - .image.RO : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF) { -#endif + .image.RO : AT(IMAGE_RO_AT) { *(.image.RO) } > FLASH =0xff @@ -44,19 +60,7 @@ SECTIONS } > FLASH =0xff #endif -#if defined(NPCX_RO_HEADER) - /* npcx uses *STORAGE_OFF to plan the layout of flash image */ - .image.RW : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_EC_WRITABLE_STORAGE_OFF \ - + CONFIG_RW_STORAGE_OFF) { -#elif (CONFIG_RO_MEM_OFF == CONFIG_RW_MEM_OFF) -/* This is applicable to ECs in which RO and RW execution is -mapped to the same location but we still have to generate an ec.bin with RO -and RW images at different Flash offset */ - .image.RW : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF + \ - CONFIG_RO_SIZE) { -#else - .image.RW : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RW_MEM_OFF) { -#endif + .image.RW : AT(IMAGE_RW_AT) { *(.image.RW) } > FLASH =0xff #ifdef CONFIG_RWSIG_TYPE_RWSIG |