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| author | Mulin Chao <mlchao@nuvoton.com> | 2015-09-17 21:21:00 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-09-21 20:50:56 -0700 |
| commit | 95ea672601681d01166cf2b8c6cbd297dcc9295a (patch) | |
| tree | 7731db4c2d1792e91671b248482a23dff9b24448 /common/firmware_image.lds.S | |
| parent | b03f92fbccb4cd07edee75b6eea654692f3dbdf9 (diff) | |
| download | chrome-ec-95ea672601681d01166cf2b8c6cbd297dcc9295a.tar.gz | |
nuc: Fixed flash layout issue for npcx
Fixed flash layout issue for npcx
Modified drivers:
1. config_flash_layout.h: Fixed layout issue for npcx
2. flash_ec: add flashrom support for boards without JTAG in servo
connector
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: I0b9b679c52b8a8e2a26c278b5024d0350fb77338
Reviewed-on: https://chromium-review.googlesource.com/300392
Commit-Ready: Mulin Chao <mlchao@nuvoton.com>
Tested-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'common/firmware_image.lds.S')
| -rw-r--r-- | common/firmware_image.lds.S | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/common/firmware_image.lds.S b/common/firmware_image.lds.S index 0ed3fd6563..3104f41c64 100644 --- a/common/firmware_image.lds.S +++ b/common/firmware_image.lds.S @@ -14,7 +14,14 @@ MEMORY SECTIONS { . = ALIGN(CONFIG_FLASH_BANK_SIZE); +#if defined(NPCX_RO_HEADER) +/* Replace *_MEM_OFF with *_STORAGE_OFF to indicate flat file contains header + * or some struture which doesn't belong to FW */ + .image.RO : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_EC_PROTECTED_STORAGE_OFF\ + ) { +#else .image.RO : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF) { +#endif *(.image.RO) } > FLASH =0xff . = ALIGN(CONFIG_FLASH_BANK_SIZE); @@ -25,7 +32,12 @@ SECTIONS } > FLASH =0xff . = ALIGN(CONFIG_FLASH_BANK_SIZE); #endif -#ifdef CONFIG_EXTERNAL_STORAGE + +#if defined(NPCX_RO_HEADER) + /* npcx uses *STORAGE_OFF to plan the layout of flash image */ + .image.RW : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_EC_WRITABLE_STORAGE_OFF \ + + CONFIG_RW_STORAGE_OFF) { +#elif (CONFIG_RO_MEM_OFF == CONFIG_RW_MEM_OFF) /* This is applicable to ECs in which RO and RW execution is mapped to the same location but we still have to generate an ec.bin with RO and RW images at different Flash offset */ |