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| author | Keith Short <keithshort@chromium.org> | 2020-07-27 17:00:04 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-08-13 14:26:51 +0000 |
| commit | 8ce0c16cc2d153b0002fbea64d08c09d98c3835f (patch) | |
| tree | 66ee97307901b429f19c1dfc86adad96bc6c4eb9 /common/flash.c | |
| parent | 53c77e42bc99f8902ebdc9ff71cc94d2ae152fee (diff) | |
| download | chrome-ec-8ce0c16cc2d153b0002fbea64d08c09d98c3835f.tar.gz | |
flash: allow programming larger EC images
For some ECs, the EC image size is limited by the amount of code RAM
instead of 1/2 the total flash size. In this instance, there is unused
flash that can be used for single use data objects.
To support linking data objects into the unused flash area, increase the
region size that can be programmed for RW images.
Analysis of chips that are impacted by this change:
Chip EC image limit New RW size limit
mec1701h 188 KiB 256 KiB
mec17xx_2E00 188 KiB 256 KiB
npcx5m5g 96 KiB 128 KiB
npcx5m6g 224 KiB 256 KiB
npcx7m6f 192 KiB 256 KiB
npcx7m6fb 192 KiB 256 KiB
npcx7m6fc 192 KiB 256 KiB
npcx7m6g 192 KiB 256 KiB
npcx7m7wb 256 KiB 512 KiB
npcx7m7wc 252 KiB 256 KiB
Boards using other chips verified that CONFIG_RW_SIZE is the same as
CONFIG_EC_WRITABLE_STORAGE_SIZE.
EC_FLASH_REGION_RO isn't used by depthcharge, only EC_FLASH_REGION_WP_RO
which is already set to the correct size.
BUG=b:160330682
BRANCH=none
TEST=make buildall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I84b9dc84568273e1ab1473e301d27ffd2b07ba7f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325764
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'common/flash.c')
| -rw-r--r-- | common/flash.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/common/flash.c b/common/flash.c index b91bfe3c62..235121f51e 100644 --- a/common/flash.c +++ b/common/flash.c @@ -1373,6 +1373,9 @@ DECLARE_HOST_COMMAND(EC_CMD_FLASH_WRITE, */ BUILD_ASSERT(CONFIG_RO_SIZE % CONFIG_FLASH_ERASE_SIZE == 0); BUILD_ASSERT(CONFIG_RW_SIZE % CONFIG_FLASH_ERASE_SIZE == 0); +BUILD_ASSERT(EC_FLASH_REGION_RO_SIZE % CONFIG_FLASH_ERASE_SIZE == 0); +BUILD_ASSERT(CONFIG_EC_WRITABLE_STORAGE_SIZE % CONFIG_FLASH_ERASE_SIZE == 0); + #endif static enum ec_status flash_command_erase(struct host_cmd_handler_args *args) @@ -1499,12 +1502,12 @@ flash_command_region_info(struct host_cmd_handler_args *args) r->offset = CONFIG_EC_PROTECTED_STORAGE_OFF + CONFIG_RO_STORAGE_OFF - EC_FLASH_REGION_START; - r->size = CONFIG_RO_SIZE; + r->size = EC_FLASH_REGION_RO_SIZE; break; case EC_FLASH_REGION_ACTIVE: r->offset = flash_get_rw_offset(system_get_active_copy()) - EC_FLASH_REGION_START; - r->size = CONFIG_RW_SIZE; + r->size = CONFIG_EC_WRITABLE_STORAGE_SIZE; break; case EC_FLASH_REGION_WP_RO: r->offset = CONFIG_WP_STORAGE_OFF - @@ -1514,7 +1517,7 @@ flash_command_region_info(struct host_cmd_handler_args *args) case EC_FLASH_REGION_UPDATE: r->offset = flash_get_rw_offset(system_get_update_copy()) - EC_FLASH_REGION_START; - r->size = CONFIG_RW_SIZE; + r->size = CONFIG_EC_WRITABLE_STORAGE_SIZE; break; default: return EC_RES_INVALID_PARAM; |