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| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-09-04 19:09:33 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-09-16 14:49:31 -0700 |
| commit | d58e54730c03290296df5bb65cb84264e4b2facc (patch) | |
| tree | d736570c84a0e9737b8881ec68b073327a5c2ae5 /common/flash.c | |
| parent | 4b3c13ddfefd229dde49fb4cbf5a6bfc49f64973 (diff) | |
| download | chrome-ec-d58e54730c03290296df5bb65cb84264e4b2facc.tar.gz | |
cleanup: Rename geometry constants
Rename and add geometry constants to match spec doc -
https://goo.gl/fnzTvr.
CONFIG_FLASH_BASE becomes CONFIG_PROGRAM_MEMORY_BASE
CONFIG_FLASH_MAPPED becomes CONFIG_MAPPED_STORAGE
Add CONFIG_INTERNAL_STORAGE, CONFIG_EXTERNAL_STORAGE and
CONFIG_MAPPED_STORAGE_BASE where appropriate.
This CL leaves chip/npcx in a broken state -- it's fixed in a follow-up
CL.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Change-Id: Idb3c4ed9f7f6edd0a6d49ad11753eba713e67a80
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/297484
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'common/flash.c')
| -rw-r--r-- | common/flash.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/common/flash.c b/common/flash.c index b5dad96438..0f45b8e4d5 100644 --- a/common/flash.c +++ b/common/flash.c @@ -29,8 +29,8 @@ * If flash isn't mapped to the EC's address space, it's probably SPI, and * should be using SPI write protect, not PSTATE. */ -#ifndef CONFIG_FLASH_MAPPED -#error "PSTATE should only be used with internal mapped mapped flash." +#if !defined(CONFIG_INTERNAL_STORAGE) || !defined(CONFIG_MAPPED_STORAGE) +#error "PSTATE should only be used with internal mem-mapped flash." #endif #ifdef CONFIG_FLASH_PSTATE_BANK @@ -101,7 +101,7 @@ int flash_range_ok(int offset, int size_req, int align) return 1; } -#ifdef CONFIG_FLASH_MAPPED +#ifdef CONFIG_MAPPED_STORAGE /** * Get the physical memory address of a flash offset * @@ -115,7 +115,7 @@ int flash_range_ok(int offset, int size_req, int align) */ static const char *flash_physical_dataptr(int offset) { - return (char *)((uintptr_t)CONFIG_FLASH_BASE + offset); + return (char *)((uintptr_t)CONFIG_PROGRAM_MEMORY_BASE + offset); } int flash_dataptr(int offset, int size_req, int align, const char **ptrp) @@ -246,7 +246,8 @@ static int flash_write_pstate(uint32_t flags) * Write a new pstate. We can overwrite the existing value, because * we're only moving bits from the erased state to the unerased state. */ - return flash_physical_write(get_pstate_addr() - CONFIG_FLASH_BASE, + return flash_physical_write(get_pstate_addr() - + CONFIG_PROGRAM_MEMORY_BASE, sizeof(new_pstate), (const char *)&new_pstate); } @@ -258,7 +259,7 @@ int flash_is_erased(uint32_t offset, int size) { const uint32_t *ptr; -#ifdef CONFIG_FLASH_MAPPED +#ifdef CONFIG_MAPPED_STORAGE /* Use pointer directly to flash */ if (flash_dataptr(offset, size, sizeof(uint32_t), (const char **)&ptr) < 0) @@ -294,7 +295,7 @@ int flash_is_erased(uint32_t offset, int size) int flash_read(int offset, int size, char *data) { -#ifdef CONFIG_FLASH_MAPPED +#ifdef CONFIG_MAPPED_STORAGE const char *src; if (flash_dataptr(offset, size, 1, &src) < 0) |