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author | Vincent Palatin <vpalatin@chromium.org> | 2017-03-22 15:30:59 +0100 |
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committer | chrome-bot <chrome-bot@chromium.org> | 2017-03-24 09:32:53 -0700 |
commit | d9afaba9b4043a9d953b0d4c4e846520b04a0597 (patch) | |
tree | 3dbb4cfce11e82158926c1d28f665c3f2a5b89a3 /common/flash.c | |
parent | e43ba03ebf3c921f2abfd4e9153725e87f28da62 (diff) | |
download | chrome-ec-d9afaba9b4043a9d953b0d4c4e846520b04a0597.tar.gz |
flash: ensure proper pstate alignment
The pstate structure is written using the low-level
flash_physical_write() function. As a consequence, it is supposed to
meet the CONFIG_FLASH_WRITE_SIZE alignment constraint.
Add a build-time assertion to avoid silent failures.
Slightly decrease the maximum size of the serial number string, so the
structure has a natural 32-byte alignment which is compatible with a
large number of platforms (including STM32L4 which requires 64-bit
alignment).
Of course, this change is not fully backward-compatible.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chromium:571477 b:35648258
TEST=on STM32L442, build and run 'flashrom --wp-enable' without failure.
Change-Id: Ia8f82790a61a6c7d2cf9bfeb95bfdaf7b8c52d11
Reviewed-on: https://chromium-review.googlesource.com/458201
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Nick Sanders <nsanders@chromium.org>
Diffstat (limited to 'common/flash.c')
-rw-r--r-- | common/flash.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/common/flash.c b/common/flash.c index 020dbd727e..d070e5f6b3 100644 --- a/common/flash.c +++ b/common/flash.c @@ -38,7 +38,7 @@ /* NOTE: It's not expected that RO and RW will support * differing PSTATE versions. */ #define PERSIST_STATE_VERSION 3 /* Expected persist_state.version */ -#define SERIALNO_MAX 30 +#define SERIALNO_MAX 28 /* Flags for persist_state.flags */ /* Protect persist state and RO firmware at boot */ @@ -53,6 +53,10 @@ struct persist_state { uint8_t reserved; /* Reserved; set 0 */ uint8_t serialno[SERIALNO_MAX]; /* Serial number. */ }; +/* written with flash_physical_write, need to respect alignment constraints */ +#ifndef CHIP_FAMILY_STM32L /* STM32L1xx is somewhat lying to us */ +BUILD_ASSERT(sizeof(struct persist_state) % CONFIG_FLASH_WRITE_SIZE == 0); +#endif #else /* !CONFIG_FLASH_PSTATE_BANK */ |