diff options
author | Scott <scollyer@chromium.org> | 2016-09-08 18:52:01 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2016-09-12 12:53:59 -0700 |
commit | 017606c927ccde36cf39a299170f85df8f3de402 (patch) | |
tree | f1499e538e1480839cff599eeb54a7e62adcc22e /common/i2cs_tpm.c | |
parent | a78f6bfea6b9c3392d036e6307696284c2384e8e (diff) | |
download | chrome-ec-017606c927ccde36cf39a299170f85df8f3de402.tar.gz |
Cr50: I2CS TPM: Combine 1 and 4 byte register read block
In the initial design multi-byte registers were being converted to
network byte order and so there was reason to treat 1 byte and 4 byte
register reads differently. However, since the conversion to network
byte order is not being done, there is no reason to treat these cases
differently outside of the number of bytes to read.
BRANCH=none
BUG=chrome-os-partner:40397
TEST=manual
Reboot Reef and verify that TPM is working in coreboot
coreboot-coreboot-unknown.9999.fbbcb2d Thu Sep 8 19:41:15 UTC 2016
LPSS I2C bus 2 at 0xfe022000 (400 KHz)
tpm_vendor_probe: ValidSts bit set(1) in TPM_ACCESS register after 5 ms
I2C TPM 2:50 (chip type cr50 device-id 0x28)
setup_tpm():404: TPM: SetupTPM() succeeded
src/lib/tpm2_tlcl.c:179 index 0x1007 return code 0
Change-Id: If74c432136c02d334e0d58d16dc817d7773b0584
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/382688
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Diffstat (limited to 'common/i2cs_tpm.c')
-rw-r--r-- | common/i2cs_tpm.c | 21 |
1 files changed, 6 insertions, 15 deletions
diff --git a/common/i2cs_tpm.c b/common/i2cs_tpm.c index 4c7d79341f..b466e10e27 100644 --- a/common/i2cs_tpm.c +++ b/common/i2cs_tpm.c @@ -82,7 +82,6 @@ static void wr_complete_handler(void *i2cs_data, size_t i2cs_data_size) size_t i; uint16_t tpm_reg; uint8_t *data = i2cs_data; - uint8_t reg_value[4]; const struct i2c_tpm_reg_map *i2c_reg_entry = NULL; uint16_t reg_size; @@ -122,24 +121,16 @@ static void wr_complete_handler(void *i2cs_data, size_t i2cs_data_size) data++; if (!i2cs_data_size) { + uint8_t reg_value[4]; + /* * The master wants to read the register, read the value and * pass it to the controller. */ - if (reg_size == 1) { - uint8_t byte_reg; - - /* Always read 4 bytes. */ - tpm_register_get(tpm_reg, &byte_reg, sizeof(byte_reg)); - i2cs_post_read_data(byte_reg); - return; - } - - if (reg_size == 4) { - tpm_register_get(tpm_reg, reg_value, sizeof(reg_value)); - - /* Write data to I2CS HW fifo */ - for (i = 0; i < sizeof(reg_value); i++) + if (reg_size == 1 || reg_size == 4) { + /* Always read regsize number of bytes */ + tpm_register_get(tpm_reg, reg_value, reg_size); + for (i = 0; i < reg_size; i++) i2cs_post_read_data(reg_value[i]); return; } |