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| author | Virendra Kakade <virendra.kakade@ni.com> | 2019-09-10 16:52:21 -0500 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-03-13 02:17:11 +0000 |
| commit | 67bf9288ee4f30be60f37e64df0d95ef4bbc1c77 (patch) | |
| tree | cd017d3015fb9b6329929041bbec2e78757537da /common/main.c | |
| parent | 36d2d918d324214afdb2e6cb05de9ed40ee681ef (diff) | |
| download | chrome-ec-67bf9288ee4f30be60f37e64df0d95ef4bbc1c77.tar.gz | |
stm32: pwm: fix timer PSC register calculation
The timer PSC register value is calculated based on the cpu
clock frequency but it should actually be based on the timer
clock frequency. Timer clock frequency and cpu clock frequency
may be the same or different based on the STM32 variant.
Example: In the STM32F412 case, timer freq = cpu freq * 2.
This leads to incorrect PSC calculation based on old formula,
ultimately leading to a frequency twice that of requested.
BUG=none
BRANCH=none
TEST=make -j4 buildall
TEST=verified that I got expected frequency on a stm32f412 pwm
output with this change.
Change-Id: I9ff954cf6304507f7506f5cf974857f6c3140b4e
Signed-off-by: Virendra Kakade <virendra.kakade@ni.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2096841
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Commit-Queue: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Diffstat (limited to 'common/main.c')
0 files changed, 0 insertions, 0 deletions