core/riscv-rv32i: misc fixes

1. The end of text section is 4-byte aligned.
   We found that rodata section will be shifted 2 bytes in binary file
   if compressed instruction (16-bit instruction) is enabled.
   So we fix it.

2. Ensure the scratchpad is behind system stack. So the guard value
   in scratchpad that we filled in at task initialization would not
   get overwrite on first context switch (Because we will change to
   use system stack in ISR if SP is greater than the end of system stack).

3. Put some task functions into __ram_code section to fill up the gap.

BUG=none
BRANCH=none
TEST=This change saves 1408 bytes space at RO image and improves ~10ms
     boot time.

Before the change:
173516 bytes in flash still available on it83xx_evb RO
> [0.028248 low power idle task started]

After the change:
174924 bytes in flash still available on it83xx_evb RO
> [0.018774 low power idle task started]

Change-Id: I32506383aa63424f12794fb543c51b0485bace8f
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1831931
Reviewed-by: Jett Rink <jettrink@chromium.org>

0 files changed, 0 insertions, 0 deletions