diff options
| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-09-07 14:12:57 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-09-16 14:49:33 -0700 |
| commit | fe77303bec6c78786a9df1dbdb33af64787e20c8 (patch) | |
| tree | 772d2fbb53178121ddca0dfbafbd304ee075ce1b /common/spi_flash.c | |
| parent | 1167cad6a88e45bbf6a5599f19d018cd6a8b5233 (diff) | |
| download | chrome-ec-fe77303bec6c78786a9df1dbdb33af64787e20c8.tar.gz | |
cleanup: Remove redundant FLASH_SIZE CONFIGs
Since there is no more concept of a flash region belonging only to the
EC, we only need one FLASH_SIZE config, which represents the actual
physical size of flash.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I18a34a943e02c8a029f330f213a8634a2ca418b6
Reviewed-on: https://chromium-review.googlesource.com/297824
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'common/spi_flash.c')
| -rw-r--r-- | common/spi_flash.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/common/spi_flash.c b/common/spi_flash.c index 2407f9120d..248e401195 100644 --- a/common/spi_flash.c +++ b/common/spi_flash.c @@ -155,7 +155,7 @@ int spi_flash_read(uint8_t *buf_usr, unsigned int offset, unsigned int bytes) (offset >> 8) & 0xFF, offset & 0xFF}; - if (offset + bytes > CONFIG_SPI_FLASH_SIZE) + if (offset + bytes > CONFIG_FLASH_SIZE) return EC_ERROR_INVAL; return spi_transaction(SPI_FLASH_DEVICE, cmd, 4, buf_usr, bytes); @@ -218,7 +218,7 @@ int spi_flash_erase(unsigned int offset, unsigned int bytes) int rv = EC_SUCCESS; /* Invalid input */ - if (offset + bytes > CONFIG_SPI_FLASH_SIZE) + if (offset + bytes > CONFIG_FLASH_SIZE) return EC_ERROR_INVAL; /* Not aligned to sector (4kb) */ @@ -266,7 +266,7 @@ int spi_flash_write(unsigned int offset, unsigned int bytes, int rv, write_size; /* Invalid input */ - if (!data || offset + bytes > CONFIG_SPI_FLASH_SIZE || + if (!data || offset + bytes > CONFIG_FLASH_SIZE || bytes > SPI_FLASH_MAX_WRITE_SIZE) return EC_ERROR_INVAL; @@ -414,7 +414,7 @@ int spi_flash_check_protect(unsigned int offset, unsigned int bytes) int rv = EC_SUCCESS; /* Invalid value */ - if (sr1 == -1 || sr2 == -1 || offset + bytes > CONFIG_SPI_FLASH_SIZE) + if (sr1 == -1 || sr2 == -1 || offset + bytes > CONFIG_FLASH_SIZE) return EC_ERROR_INVAL; /* Compute current protect range */ @@ -445,7 +445,7 @@ int spi_flash_set_protect(unsigned int offset, unsigned int bytes) uint8_t sr2 = spi_flash_get_status2(); /* Invalid values */ - if (sr1 == -1 || sr2 == -1 || offset + bytes > CONFIG_SPI_FLASH_SIZE) + if (sr1 == -1 || sr2 == -1 || offset + bytes > CONFIG_FLASH_SIZE) return EC_ERROR_INVAL; /* Compute desired protect range */ @@ -592,7 +592,7 @@ static int command_spi_flashread(int argc, char **argv) spi_enable(CONFIG_SPI_FLASH_PORT, 1); /* Can't read past size of memory */ - if (offset + bytes > CONFIG_SPI_FLASH_SIZE) + if (offset + bytes > CONFIG_FLASH_SIZE) return EC_ERROR_INVAL; /* Wait for previous operation to complete */ |