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author | Ayushee <ayushee.shah@intel.com> | 2020-05-14 13:29:46 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-06-05 10:15:41 +0000 |
commit | 10a645d18be5ba77a11ba0a3743b0fe7e81c7a25 (patch) | |
tree | d07318bc76c8813032bb96c48a764f56711d6378 /common/usb_pd_alt_mode_dfp.c | |
parent | 5fceb8b92e1fc492036d57d1d0f9df81c6c3e2ff (diff) | |
download | chrome-ec-10a645d18be5ba77a11ba0a3743b0fe7e81c7a25.tar.gz |
usb_pd: Move USB4 functions to common file
Added a check for CONFIG_USB_PD_ALT_MODE_DFP in pd_send_enter_usb() and
added separate configs for USB4 DRD and USB3.2 DRD
BUG=b:148528713
BRANCH=none
TEST=Able to enter USB4 mode with following passive cables -
a. Rev 3 USB3.2 Gen 1, USB3.2 Gen 2 and USB4 Gen 3
b. Rev 2 USB3.1 Gen1/Gen2
Change-Id: I80c9b7569429bc54db08d78b5a6eee16780d6fe1
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051631
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Diffstat (limited to 'common/usb_pd_alt_mode_dfp.c')
-rw-r--r-- | common/usb_pd_alt_mode_dfp.c | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/common/usb_pd_alt_mode_dfp.c b/common/usb_pd_alt_mode_dfp.c index 42b21a6fa8..9fc6dfc5aa 100644 --- a/common/usb_pd_alt_mode_dfp.c +++ b/common/usb_pd_alt_mode_dfp.c @@ -881,6 +881,23 @@ __overridable enum tbt_compat_cable_speed board_get_max_tbt_speed(int port) * ############################################################################ */ +bool is_usb4_vdo(int port, int cnt, uint32_t *payload) +{ + enum idh_ptype ptype = PD_IDH_PTYPE(payload[VDO_I(IDH)]); + + if (IS_PD_IDH_UFP_PTYPE(ptype)) { + /* + * Ref: USB Type-C Cable and Connector Specification + * Figure 5-1 USB4 Discovery and Entry Flow Model + * Device USB4 VDO detection. + */ + return IS_ENABLED(CONFIG_USB_PD_USB4) && + is_vdo_present(cnt, VDO_INDEX_PTYPE_UFP1_VDO) && + PD_PRODUCT_IS_USB4(payload[VDO_INDEX_PTYPE_UFP1_VDO]); + } + return false; +} + /* * For Cable rev 3.0: USB4 cable speed is set according to speed supported by * the port and the response received from the cable, whichever is least. @@ -924,6 +941,58 @@ enum usb_rev30_ss get_usb4_cable_speed(int port) USB_R30_SS_U40_GEN3 : USB_R30_SS_U32_U40_GEN2; } +uint32_t get_enter_usb_msg_payload(int port) +{ + /* + * Ref: USB Power Delivery Specification Revision 3.0, Version 2.0 + * Table 6-47 Enter_USB Data Object + */ + union enter_usb_data_obj eudo; + struct pd_cable *cable; + + if (!IS_ENABLED(CONFIG_USB_PD_USB4)) + return 0; + + cable = pd_get_cable_attributes(port); + eudo.mode = USB_PD_40; + eudo.usb4_drd_cap = IS_ENABLED(CONFIG_USB_PD_USB4_DRD); + eudo.usb3_drd_cap = IS_ENABLED(CONFIG_USB_PD_USB32_DRD); + eudo.cable_speed = get_usb4_cable_speed(port); + + if ((cable->rev == PD_REV30) && + (get_usb_pd_cable_type(port) == IDH_PTYPE_ACABLE)) { + eudo.cable_type = (cable->attr2.a2_rev30.active_elem == + ACTIVE_RETIMER) ? CABLE_TYPE_ACTIVE_RETIMER : + CABLE_TYPE_ACTIVE_REDRIVER; + /* TODO: Add eudo.cable_type for Revisiosn 2 active cables */ + } else { + eudo.cable_type = CABLE_TYPE_PASSIVE; + } + + switch (cable[port].attr.p_rev20.vbus_cur) { + case USB_VBUS_CUR_3A: + eudo.cable_current = USB4_CABLE_CURRENT_3A; + break; + case USB_VBUS_CUR_5A: + eudo.cable_current = USB4_CABLE_CURRENT_5A; + break; + default: + eudo.cable_current = USB4_CABLE_CURRENT_INVALID; + break; + } + eudo.pcie_supported = IS_ENABLED(CONFIG_USB_PD_PCIE_TUNNELING); + eudo.dp_supported = IS_ENABLED(CONFIG_USB_PD_ALT_MODE_DFP); + eudo.tbt_supported = IS_ENABLED(CONFIG_USB_PD_TBT_COMPAT_MODE); + eudo.host_present = 1; + + return eudo.raw_value; +} + +__overridable bool board_is_tbt_usb4_port(int port) +{ + return true; +} + __overridable void svdm_safe_dp_mode(int port) { /* make DP interface safe until configure */ |