diff options
author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2020-02-04 11:40:23 -0800 |
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committer | Commit Bot <commit-bot@chromium.org> | 2020-02-07 09:14:25 +0000 |
commit | 596466a21da2995b9294fc354895c9a8b5b7849e (patch) | |
tree | e37604dd680ab18abca683a1ec6ec8eb2498da0e /common/usb_pd_console_cmd.c | |
parent | eb1d3ad5e8d77e9a925268ce048a27b6aea9da9e (diff) | |
download | chrome-ec-596466a21da2995b9294fc354895c9a8b5b7849e.tar.gz |
TCPMv1/v2: Move "pdcable" console command to common file
BUG=b:148528713
BRANCH=none
TEST=make buildall -j
Change-Id: I7f78efeb74536d5d6c5dd0b4bd5f32325c1500ec
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2036604
Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'common/usb_pd_console_cmd.c')
-rw-r--r-- | common/usb_pd_console_cmd.c | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/common/usb_pd_console_cmd.c b/common/usb_pd_console_cmd.c index 29871956c7..86e430344f 100644 --- a/common/usb_pd_console_cmd.c +++ b/common/usb_pd_console_cmd.c @@ -82,4 +82,100 @@ DECLARE_CONSOLE_COMMAND(pe, command_pe, "<port> dump", "USB PE"); #endif /* CONFIG_CMD_USB_PD_PE */ + +#ifdef CONFIG_CMD_USB_PD_CABLE +static const char * const cable_type[] = { + [IDH_PTYPE_PCABLE] = "Passive", + [IDH_PTYPE_ACABLE] = "Active", +}; + +static const char * const cable_curr[] = { + [USB_VBUS_CUR_3A] = "3A", + [USB_VBUS_CUR_5A] = "5A", +}; + +static int command_cable(int argc, char **argv) +{ + int port; + char *e; + struct pd_cable *cable; + + if (argc < 2) + return EC_ERROR_PARAM_COUNT; + + port = strtoi(argv[1], &e, 0); + if (*e || port >= board_get_usb_pd_port_count()) + return EC_ERROR_PARAM2; + + cable = pd_get_cable_attributes(port); + + if (!cable->is_identified) { + ccprintf("Cable not identified.\n"); + return EC_SUCCESS; + } + + ccprintf("Cable Type: "); + if (cable->type != IDH_PTYPE_PCABLE && + cable->type != IDH_PTYPE_ACABLE) { + ccprintf("Not Emark Cable\n"); + return EC_SUCCESS; + } + ccprintf("%s\n", cable_type[cable->type]); + + /* Cable revision */ + ccprintf("Cable Rev: %d.0\n", cable->rev + 1); + + /* + * For rev 2.0, rev 3.0 active and passive cables have same bits for + * connector type (Bit 19:18) and current handling capability bit 6:5 + */ + ccprintf("Connector Type: %d\n", cable->attr.p_rev20.connector); + + if (cable->attr.p_rev20.vbus_cur) { + ccprintf("Cable Current: %s\n", + cable->attr.p_rev20.vbus_cur > ARRAY_SIZE(cable_curr) ? + "Invalid" : cable_curr[cable->attr.p_rev20.vbus_cur]); + } else + ccprintf("Cable Current: Invalid\n"); + + /* + * For Rev 3.0 passive cables and Rev 2.0 active and passive cables, + * USB Superspeed Signaling support have same bits 2:0 + */ + if (cable->type == IDH_PTYPE_PCABLE) + ccprintf("USB Superspeed Signaling support: %d\n", + cable[port].attr.p_rev20.ss); + + /* + * For Rev 3.0 active cables and Rev 2.0 active and passive cables, + * SOP" controller preset have same bit 3 + */ + if (cable->type == IDH_PTYPE_ACABLE) + ccprintf("SOP'' Controller: %s present\n", + cable->attr.a_rev20.sop_p_p ? "" : "Not"); + + if (cable->rev == PD_REV30) { + /* + * For Rev 3.0 active and passive cables, Max Vbus vtg have + * same bits 10:9. + */ + ccprintf("Max vbus voltage: %d\n", + 20 + 10 * cable->attr.p_rev30.vbus_max); + + /* For Rev 3.0 Active cables */ + if (cable->type == IDH_PTYPE_ACABLE) { + ccprintf("SS signaling: USB_SS_GEN%u\n", + cable->attr2.a2_rev30.usb_gen ? 2 : 1); + ccprintf("Number of SS lanes supported: %u\n", + cable->attr2.a2_rev30.usb_lanes); + } + } + return EC_SUCCESS; +} + +DECLARE_CONSOLE_COMMAND(pdcable, command_cable, + "<port>", + "Cable Characteristics"); +#endif /* CONFIG_CMD_USB_PD_CABLE */ + #endif /* CONFIG_USB_PD_ALT_MODE_DFP */ |