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authorRuibin Chang <ruibin.chang@ite.com.tw>2020-07-07 15:20:51 +0800
committerCommit Bot <commit-bot@chromium.org>2020-07-14 06:46:03 +0000
commitba4b10a78f8da08a56651eebf6941571a0d1d751 (patch)
tree1f4bf1b10754579fcac40349dad055e1d1c7a455 /common/usb_pd_protocol.c
parent3c07efdf6d9242c345148c601a6ade576aa24247 (diff)
downloadchrome-ec-ba4b10a78f8da08a56651eebf6941571a0d1d751.tar.gz
TCPMv1, TCPMv2: add pd event for receiving hard reset
When we receive hard reset message, we call pd_execute_hard_reset() and set task to hard reset state, but the waked up pd_task() may have chance setting to other state. So I add a pd event for receiving hard reset, then waked up pd_task() set the state to hard reset. TCPMv1: When we are in SNK_HRAD_RESET_RECOVER state, we enable rx. At this time If port partner sends source capability, HW auto responds GoodCRC, but in SNK_HRAD_RESET_RECOVER state the handle_data_request() can't process source capability then break the case. So partner sender response timeout and tx hard reset. So I move the enable_rx() to SNK_DISCOVERY state that we are able to handle source capability. BRANCH=None BUG=b:159394180 TEST=On board reef_it8320, and it81202_pdevb: 1.TCPMv1: Rx Hard reset -> done Vbus cycle, and keep cc connection, When we're SRC and SNK. 2.TCPMv2: Rx Hard reset -> done Vbus cycle, and keep cc connection, When we're SRC and SNK. Change-Id: Ia4944883f4ee0420183cb4d1ec62743c49386ea3 Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1389992 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Diffstat (limited to 'common/usb_pd_protocol.c')
-rw-r--r--common/usb_pd_protocol.c25
1 files changed, 15 insertions, 10 deletions
diff --git a/common/usb_pd_protocol.c b/common/usb_pd_protocol.c
index d9ec69c888..1d465385ea 100644
--- a/common/usb_pd_protocol.c
+++ b/common/usb_pd_protocol.c
@@ -1342,6 +1342,7 @@ void pd_execute_hard_reset(int port)
pd[port].msg_id = 0;
invalidate_last_message_id(port);
+ tcpm_set_rx_enable(port, 0);
#ifdef CONFIG_USB_PD_ALT_MODE_DFP
pd_dfp_exit_mode(port, TCPC_TX_SOP, 0, 0);
#endif
@@ -3228,6 +3229,9 @@ void pd_task(void *u)
set_state(port, PD_STATE_HARD_RESET_SEND);
#endif /* defined(CONFIG_USBC_PPC) */
+ if (evt & PD_EVENT_RX_HARD_RESET)
+ pd_execute_hard_reset(port);
+
/* process any potential incoming message */
incoming_packet = tcpm_has_pending_message(port);
if (incoming_packet) {
@@ -4156,16 +4160,6 @@ void pd_task(void *u)
}
if (pd_is_vbus_present(port) &&
snk_hard_reset_vbus_off) {
-#ifdef CONFIG_USB_PD_TCPM_TCPCI
- /*
- * After transmitting hard reset, TCPM writes
- * to RECEIVE_MESSAGE register to enable
- * PD message passing.
- */
- if (pd_comm_is_enabled(port))
- tcpm_set_rx_enable(port, 1);
-#endif /* CONFIG_USB_PD_TCPM_TCPCI */
-
/* VBUS went high again */
set_state(port, PD_STATE_SNK_DISCOVERY);
timeout = 10*MSEC;
@@ -4181,6 +4175,17 @@ void pd_task(void *u)
/* Wait for source cap expired only if we are enabled */
if ((pd[port].last_state != pd[port].task_state)
&& pd_comm_is_enabled(port)) {
+#ifdef CONFIG_USB_PD_TCPM_TCPCI
+ /*
+ * If we come from hard reset recover state,
+ * then we can process the source capabilities
+ * form partner now, so enable PHY layer
+ * receiving function.
+ */
+ if (pd[port].last_state ==
+ PD_STATE_SNK_HARD_RESET_RECOVER)
+ tcpm_set_rx_enable(port, 1);
+#endif /* CONFIG_USB_PD_TCPM_TCPCI */
#ifdef CONFIG_USB_PD_RESET_MIN_BATT_SOC
/*
* If the battery has not met a configured safe