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| author | Edward Hill <ecgh@chromium.org> | 2019-10-10 15:50:32 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-10-25 18:52:10 +0000 |
| commit | ae8a4284f2cef0afb2235ddfa8e66cc5c1925609 (patch) | |
| tree | d9cf217d53cd016bc7a98bf1f85425e46bcf068a /common/usb_port_power_smart.c | |
| parent | 9f392b0d616f6fec17d213736e6bf9f4217392e4 (diff) | |
| download | chrome-ec-ae8a4284f2cef0afb2235ddfa8e66cc5c1925609.tar.gz | |
usb_port_power_smart: Add support for IO expander GPIOs
Allow CONFIG_USB_PORT_POWER_SMART GPIO signals to be either local GPIOs
or IO expander GPIOs.
BUG=b:138600691
BRANCH=none
TEST=CONFIG_USB_PORT_POWER_SMART with IO expander signals works on Trembyle
Change-Id: Ic5273926ec4f428586370175a136bff68900a323
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1854779
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Diffstat (limited to 'common/usb_port_power_smart.c')
| -rw-r--r-- | common/usb_port_power_smart.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/common/usb_port_power_smart.c b/common/usb_port_power_smart.c index ac3509b692..59474ff7fe 100644 --- a/common/usb_port_power_smart.c +++ b/common/usb_port_power_smart.c @@ -50,16 +50,16 @@ static void usb_charge_set_control_mode(int port_id, int mode) * port wins. Also, only CTL1 can be set; the other pins are * hard-wired. */ - gpio_set_level(GPIO_USB_CTL1, mode & 0x4); + gpio_or_ioex_set_level(GPIO_USB_CTL1, mode & 0x4); #else if (port_id == 0) { - gpio_set_level(GPIO_USB1_CTL1, mode & 0x4); - gpio_set_level(GPIO_USB1_CTL2, mode & 0x2); - gpio_set_level(GPIO_USB1_CTL3, mode & 0x1); + gpio_or_ioex_set_level(GPIO_USB1_CTL1, mode & 0x4); + gpio_or_ioex_set_level(GPIO_USB1_CTL2, mode & 0x2); + gpio_or_ioex_set_level(GPIO_USB1_CTL3, mode & 0x1); } else { - gpio_set_level(GPIO_USB2_CTL1, mode & 0x4); - gpio_set_level(GPIO_USB2_CTL2, mode & 0x2); - gpio_set_level(GPIO_USB2_CTL3, mode & 0x1); + gpio_or_ioex_set_level(GPIO_USB2_CTL1, mode & 0x4); + gpio_or_ioex_set_level(GPIO_USB2_CTL2, mode & 0x2); + gpio_or_ioex_set_level(GPIO_USB2_CTL3, mode & 0x1); } #endif /* defined(CONFIG_USB_PORT_POWER_SMART_SIMPLE) */ } @@ -68,12 +68,12 @@ static void usb_charge_set_control_mode(int port_id, int mode) static void usb_charge_set_enabled(int port_id, int en) { ASSERT(port_id < CONFIG_USB_PORT_POWER_SMART_PORT_COUNT); - gpio_set_level(usb_port_enable[port_id], en); + gpio_or_ioex_set_level(usb_port_enable[port_id], en); } static void usb_charge_set_ilim(int port_id, int sel) { - enum gpio_signal ilim_sel; + int ilim_sel; #if defined(CONFIG_USB_PORT_POWER_SMART_SIMPLE) || \ defined(CONFIG_USB_PORT_POWER_SMART_INVERTED) @@ -88,7 +88,7 @@ static void usb_charge_set_ilim(int port_id, int sel) ilim_sel = GPIO_USB2_ILIM_SEL; #endif - gpio_set_level(ilim_sel, sel); + gpio_or_ioex_set_level(ilim_sel, sel); } static void usb_charge_all_ports_ctrl(enum usb_charge_mode mode) |