diff options
author | Jett Rink <jettrink@chromium.org> | 2018-08-07 14:52:04 -0600 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-08-23 17:42:49 -0700 |
commit | 7487f9eef6159b9b3253b4d30e9dd0b114bd07e1 (patch) | |
tree | 21b506771c042375da02ff0f1171b7f6712d699b /common/usbc_ppc.c | |
parent | eab2576658393d15af7fc55e97e827951cafa05e (diff) | |
download | chrome-ec-7487f9eef6159b9b3253b4d30e9dd0b114bd07e1.tar.gz |
sn5s330: add low power mode
Add a low power mode method for PPCs behind a new config.
Implement the low power method for SN5S330 based off of TI AE
recommendation.
BRANCH=none
BUG=b:111520593,b:111006203
TEST=CL stack produce lower power during bip hibernate
Change-Id: Icd22f88a8f65c2cd5ab1c95b0750b1eb61e91923
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1166183
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'common/usbc_ppc.c')
-rw-r--r-- | common/usbc_ppc.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/common/usbc_ppc.c b/common/usbc_ppc.c index 7011309cf1..0961ba6e83 100644 --- a/common/usbc_ppc.c +++ b/common/usbc_ppc.c @@ -86,6 +86,19 @@ int ppc_vbus_sink_enable(int port, int enable) return ppc_chips[port].drv->vbus_sink_enable(port, enable); } +int ppc_enter_low_power_mode(int port) +{ + const struct ppc_config_t *const ppc = &ppc_chips[port]; + + if ((port < 0) || (port >= ppc_cnt)) + return EC_ERROR_INVAL; + + if (ppc->drv->enter_low_power_mode) + return ppc->drv->enter_low_power_mode(port); + else + return EC_ERROR_UNIMPLEMENTED; +} + int ppc_vbus_source_enable(int port, int enable) { if ((port < 0) || (port >= ppc_cnt)) |