diff options
| author | Scott Worley <scott.worley@microchip.corp-partner.google.com> | 2017-12-20 14:37:31 -0500 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-12-28 14:50:32 -0800 |
| commit | f8dc4617128f72cdcef4aae33afd665d3fbc5a2f (patch) | |
| tree | 7c444f354569f5308a60d85cada7d5fcb0547620 /common | |
| parent | 940dd625b9edaf1827c9c3a2349a66ec21cd59c8 (diff) | |
| download | chrome-ec-f8dc4617128f72cdcef4aae33afd665d3fbc5a2f.tar.gz | |
ec_flash: Add W25Q128 SPI flash
Add W25Q128 flash device support.
BRANCH=none
BUG=
TEST=Modify a board build for W25Q128 and check
SPI code sets flash security bits correctly.
Change-Id: I6173f4cf751f3fbf68af75983f44d357a0b954f6
Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
Diffstat (limited to 'common')
| -rw-r--r-- | common/spi_flash_reg.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/common/spi_flash_reg.c b/common/spi_flash_reg.c index 2e9fbbd469..1301e19dc5 100644 --- a/common/spi_flash_reg.c +++ b/common/spi_flash_reg.c @@ -72,7 +72,14 @@ static const struct protect_range spi_flash_protect_ranges[] = { { 0, 0, 1, { 0, 1, 1 }, 0, 0x40000 }, /* Lower 1/4 */ { 0, 0, 1, { 1, 0, 0 }, 0, 0x80000 }, /* Lower 1/2 */ }; - +#elif defined(CONFIG_SPI_FLASH_W25Q128) +static const struct protect_range spi_flash_protect_ranges[] = { + /* CMP = 0 */ + { 0, X, X, { 0, 0, 0 }, 0, 0 }, /* No protection */ + { 0, 0, 1, { 1, 0, 0 }, 0, 0x20000 }, /* Lower 1/8 */ + { 0, 0, 1, { 1, 0, 1 }, 0, 0x40000 }, /* Lower 1/4 */ + { 0, 0, 1, { 1, 1, 0 }, 0, 0x80000 }, /* Lower 1/2 */ +}; #endif /** |