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authorVic Yang <victoryang@chromium.org>2014-10-09 14:04:32 -0700
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-10-15 20:49:35 +0000
commit4a9cabc3f9e8cfbeee857180c8a0b400ef7c8092 (patch)
tree6cdc15de6e9995be04351870030ef334fee9459d /common
parentb8f73a451d9f0e62aba43dab1184bc1352ee968f (diff)
downloadchrome-ec-4a9cabc3f9e8cfbeee857180c8a0b400ef7c8092.tar.gz
Factor out common flash code for STM32F and STM32F0
This is a preparatory work for the following change for write protection support on STM32F0. BUG=chrome-os-partner:32745 TEST=make buildall BRANCH=samus Change-Id: Ic4deea06e26c4a6ac024a5388e1a5783b40e9876 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222660 Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'common')
-rw-r--r--common/flash.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/common/flash.c b/common/flash.c
index b19096b9e3..bd2c191ee7 100644
--- a/common/flash.c
+++ b/common/flash.c
@@ -188,7 +188,7 @@ int flash_protect_ro_at_boot(int enable)
* This assumes PSTATE immediately follows RO, which it does on
* all STM32 platforms (which are the only ones with this config).
*/
- flash_physical_protect_ro_at_boot(new_flags);
+ flash_physical_protect_at_boot(new_flags ? FLASH_WP_RO : FLASH_WP_NONE);
#endif
return EC_SUCCESS;