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| author | Aseda Aboagye <aaboagye@google.com> | 2021-07-22 16:41:59 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-07-29 20:36:11 +0000 |
| commit | dd9b5de765fd683a2e25cbfe83925d71fe524be2 (patch) | |
| tree | a7967998b1d539c49256008a4eafa9f9777740c0 /common | |
| parent | 5e07ac82ecf51aff07a8def8a4bae1330c426b22 (diff) | |
| download | chrome-ec-dd9b5de765fd683a2e25cbfe83925d71fe524be2.tar.gz | |
cbi: Add CONFIG_EEPROM_CBI_WP
This commit adds the config option, CONFIG_EEPROM_CBI_WP. It is to be
defined when the EC directly controls the CBI EEPROM WP signal. The EC
will set the WP according to the result of `system_is_locked()`. Note
that once the WP is set, the EC must be reset via EC_RST_ODL in order
for the WP to become unset. This is enabled by the accompanying
hardware.
BUG=b:181769483
BRANCH=None
TEST=`make -j buildall`
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: If490594ab4dd24af98119b01299215b997913b66
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3046412
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'common')
| -rw-r--r-- | common/cbi_eeprom.c | 9 | ||||
| -rw-r--r-- | common/main.c | 9 | ||||
| -rw-r--r-- | common/system.c | 2 |
3 files changed, 19 insertions, 1 deletions
diff --git a/common/cbi_eeprom.c b/common/cbi_eeprom.c index fe52bcd9f3..2761f0b977 100644 --- a/common/cbi_eeprom.c +++ b/common/cbi_eeprom.c @@ -9,6 +9,7 @@ #include "cros_board_info.h" #include "gpio.h" #include "i2c.h" +#include "system.h" #include "timer.h" #include "util.h" @@ -63,6 +64,14 @@ static int eeprom_write(uint8_t *cbi) return EC_SUCCESS; } +#ifdef CONFIG_EEPROM_CBI_WP +void cbi_latch_eeprom_wp(void) +{ + CPRINTS("WP latched"); + gpio_set_level(GPIO_EC_CBI_WP, 1); +} +#endif /* CONFIG_EEPROM_CBI_WP */ + const struct cbi_storage_driver eeprom_drv = { .store = eeprom_write, .load = eeprom_read, diff --git a/common/main.c b/common/main.c index 5564100b31..d9fbe94a1e 100644 --- a/common/main.c +++ b/common/main.c @@ -12,6 +12,7 @@ #include "common.h" #include "console.h" #include "cpu.h" +#include "cros_board_info.h" #include "dma.h" #include "eeprom.h" #include "flash.h" @@ -170,6 +171,14 @@ test_mockable __keep int main(void) #endif /* + * If the EC has exclusive control over the CBI EEPROM WP signal, have + * the EC set the WP if appropriate. Note that once the WP is set, the + * EC must be reset via EC_RST_ODL in order for the WP to become unset. + */ + if (IS_ENABLED(CONFIG_EEPROM_CBI_WP) && system_is_locked()) + cbi_latch_eeprom_wp(); + + /* * Keyboard scan init/Button init can set recovery events to * indicate to host entry into recovery mode. Before this is * done, LPC_HOST_EVENT_ALWAYS_REPORT mask needs to be initialized diff --git a/common/system.c b/common/system.c index adc510fefa..f88fb69072 100644 --- a/common/system.c +++ b/common/system.c @@ -175,7 +175,7 @@ static uint32_t __attribute__((unused)) get_size(enum ec_image copy) } } -int system_is_locked(void) +test_mockable int system_is_locked(void) { static int is_locked = -1; |