diff options
| author | Gwendal Grignou <gwendal@chromium.org> | 2017-11-07 13:54:06 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-11-16 23:32:11 -0800 |
| commit | 2590ce95385346b27366b4bce22e71d87c54eaa6 (patch) | |
| tree | 6214a5d945ccdb27fa1423119eaf22944797cf36 /common | |
| parent | 26090a142b922dfe728a24241b60d47c50112b15 (diff) | |
| download | chrome-ec-2590ce95385346b27366b4bce22e71d87c54eaa6.tar.gz | |
common: Add software CTZ implementation when needeed
CTZ - Count Trailing Zero - is not implemented in hardware on cortex0 or
nds32.
Used in ST sensor drivers.
BUG=none
BRANCH=none
TEST=compile
Change-Id: I2d62fd60f05169189b24ba2a3308bec69ed9de9c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/767609
Commit-Ready: Ely Vazquez <nadia198877@gmail.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'common')
| -rw-r--r-- | common/build.mk | 1 | ||||
| -rw-r--r-- | common/ctz.c | 27 |
2 files changed, 28 insertions, 0 deletions
diff --git a/common/build.mk b/common/build.mk index 5e779a58c2..a792bca3ad 100644 --- a/common/build.mk +++ b/common/build.mk @@ -91,6 +91,7 @@ common-$(CONFIG_SHA1)+= sha1.o common-$(CONFIG_SHA256)+=sha256.o common-$(CONFIG_SMBUS)+= smbus.o common-$(CONFIG_SOFTWARE_CLZ)+=clz.o +common-$(CONFIG_SOFTWARE_CTZ)+=ctz.o common-$(CONFIG_CMD_SPI_XFER)+=spi_commands.o common-$(CONFIG_SPI_FLASH)+=spi_flash.o spi_flash_reg.o common-$(CONFIG_SPI_FLASH_REGS)+=spi_flash_reg.o diff --git a/common/ctz.c b/common/ctz.c new file mode 100644 index 0000000000..bb6f69624e --- /dev/null +++ b/common/ctz.c @@ -0,0 +1,27 @@ +/* Copyright 2017 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Software emulation for CTZ instruction + */ + +#include "common.h" + +/** + * Count trailing zeros + * + * @param x non null integer. + * @return the number of trailing 0-bits in x, + * starting at the least significant bit position. + * + * Using a de Brujin sequence, as documented here: + * http://graphics.stanford.edu/~seander/bithacks.html#ZerosOnRightMultLookup + */ +int __keep __ctzsi2(int x) +{ + static const uint8_t MulDeBruijnBitPos[32] = { + 0, 1, 28, 2, 29, 14, 24, 3, 30, 22, 20, 15, 25, 17, 4, 8, + 31, 27, 13, 23, 21, 19, 16, 7, 26, 12, 18, 6, 11, 5, 10, 9 + }; + return MulDeBruijnBitPos[((uint32_t)((x & -x) * 0x077CB531U)) >> 27]; +} |