cleanup: Rename geometry constants

Rename and add geometry constants to match spec doc -
https://goo.gl/fnzTvr.

CONFIG_FLASH_BASE becomes CONFIG_PROGRAM_MEMORY_BASE
CONFIG_FLASH_MAPPED becomes CONFIG_MAPPED_STORAGE

Add CONFIG_INTERNAL_STORAGE, CONFIG_EXTERNAL_STORAGE and
CONFIG_MAPPED_STORAGE_BASE where appropriate.

This CL leaves chip/npcx in a broken state -- it's fixed in a follow-up
CL.

BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images

Change-Id: Idb3c4ed9f7f6edd0a6d49ad11753eba713e67a80
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/297484
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>

7 files changed, 39 insertions, 37 deletions

diff --git a/common/firmware_image.lds.S b/common/firmware_image.lds.S
index d956a3471d..546ad26c63 100644
--- a/common/firmware_image.lds.S
+++ b/common/firmware_image.lds.S
@@ -9,7 +9,7 @@ OUTPUT_FORMAT(BFD_FORMAT, BFD_FORMAT, BFD_FORMAT)
 OUTPUT_ARCH(BFD_ARCH)
 MEMORY
 {
-    FLASH (rx) : ORIGIN = CONFIG_FLASH_BASE, LENGTH = CONFIG_FLASH_SIZE
+    FLASH (rx) : ORIGIN = CONFIG_PROGRAM_MEMORY_BASE, LENGTH = CONFIG_FLASH_SIZE
 }
 SECTIONS
 {
@@ -17,15 +17,16 @@ SECTIONS
 #if defined(NPCX_RO_HEADER)
 /* Replace *_MEM_OFF with *_STORAGE_OFF to indicate flat file contains header
  * or some struture which doesn't belong to FW */
-    .image.RO : AT(CONFIG_FLASH_BASE + CONFIG_RO_STORAGE_OFF) {
+    .image.RO : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_STORAGE_OFF) {
 #else
-    .image.RO : AT(CONFIG_FLASH_BASE + CONFIG_RO_MEM_OFF) {
+    .image.RO : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF) {
 #endif
         *(.image.RO)
     } > FLASH =0xff
     . = ALIGN(CONFIG_FLASH_BANK_SIZE);
 #ifdef CONFIG_SHAREDLIB
-    .image.libsharedobjs : AT(CONFIG_FLASH_BASE + CONFIG_SHAREDLIB_MEM_OFF) {
+    .image.libsharedobjs : AT(CONFIG_PROGRAM_MEMORY_BASE + \
+                              CONFIG_SHAREDLIB_MEM_OFF) {
         *(.image.libsharedobjs)
     } > FLASH =0xff
     . = ALIGN(CONFIG_FLASH_BANK_SIZE);
@@ -34,13 +35,14 @@ SECTIONS
 /* This is applicable to ECs in which RO and RW execution is
 mapped to the same location but we still have to generate an ec.bin with RO
 and RW images at different Flash offset */
-    .image.RW : AT(CONFIG_FLASH_BASE + CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE) {
+    .image.RW : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF + \
+                   CONFIG_RO_SIZE) {
 #else
-    .image.RW : AT(CONFIG_FLASH_BASE + CONFIG_RW_MEM_OFF) {
+    .image.RW : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RW_MEM_OFF) {
 #endif
         *(.image.RW)
     } > FLASH =0xff
-    .padding : AT(CONFIG_FLASH_BASE + CONFIG_FLASH_SIZE - 1) {
+    .padding : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_FLASH_SIZE - 1) {
         BYTE(0xff);
     } > FLASH =0xff
 }
diff --git a/common/flash.c b/common/flash.c
index b5dad96438..0f45b8e4d5 100644
--- a/common/flash.c
+++ b/common/flash.c
@@ -29,8 +29,8 @@
  * If flash isn't mapped to the EC's address space, it's probably SPI, and
  * should be using SPI write protect, not PSTATE.
  */
-#ifndef CONFIG_FLASH_MAPPED
-#error "PSTATE should only be used with internal mapped mapped flash."
+#if !defined(CONFIG_INTERNAL_STORAGE) || !defined(CONFIG_MAPPED_STORAGE)
+#error "PSTATE should only be used with internal mem-mapped flash."
 #endif
 
 #ifdef CONFIG_FLASH_PSTATE_BANK
@@ -101,7 +101,7 @@ int flash_range_ok(int offset, int size_req, int align)
 	return 1;
 }
 
-#ifdef CONFIG_FLASH_MAPPED
+#ifdef CONFIG_MAPPED_STORAGE
 /**
  * Get the physical memory address of a flash offset
  *
@@ -115,7 +115,7 @@ int flash_range_ok(int offset, int size_req, int align)
  */
 static const char *flash_physical_dataptr(int offset)
 {
-	return (char *)((uintptr_t)CONFIG_FLASH_BASE + offset);
+	return (char *)((uintptr_t)CONFIG_PROGRAM_MEMORY_BASE + offset);
 }
 
 int flash_dataptr(int offset, int size_req, int align, const char **ptrp)
@@ -246,7 +246,8 @@ static int flash_write_pstate(uint32_t flags)
 	 * Write a new pstate.  We can overwrite the existing value, because
 	 * we're only moving bits from the erased state to the unerased state.
 	 */
-	return flash_physical_write(get_pstate_addr() - CONFIG_FLASH_BASE,
+	return flash_physical_write(get_pstate_addr() -
+				    CONFIG_PROGRAM_MEMORY_BASE,
 				    sizeof(new_pstate),
 				    (const char *)&new_pstate);
 }
@@ -258,7 +259,7 @@ int flash_is_erased(uint32_t offset, int size)
 {
 	const uint32_t *ptr;
 
-#ifdef CONFIG_FLASH_MAPPED
+#ifdef CONFIG_MAPPED_STORAGE
 	/* Use pointer directly to flash */
 	if (flash_dataptr(offset, size, sizeof(uint32_t),
 			  (const char **)&ptr) < 0)
@@ -294,7 +295,7 @@ int flash_is_erased(uint32_t offset, int size)
 
 int flash_read(int offset, int size, char *data)
 {
-#ifdef CONFIG_FLASH_MAPPED
+#ifdef CONFIG_MAPPED_STORAGE
 	const char *src;
 
 	if (flash_dataptr(offset, size, 1, &src) < 0)
diff --git a/common/fmap.c b/common/fmap.c
index e61df8d968..28800ee663 100644
--- a/common/fmap.c
+++ b/common/fmap.c
@@ -17,14 +17,15 @@
 #define FMAP_VER_MINOR 0
 
 /*
- * For address containing CONFIG_FLASH_BASE (symbols in *.RO.lds.S and
+ * For address containing CONFIG_PROGRAM_MEMORY_BASE (symbols in *.RO.lds.S and
  * variable), this computes the offset to the start of the image on flash.
  */
 
 #ifdef NPCX_RO_HEADER
 #define RELATIVE_RO(addr) ((addr) - CONFIG_CDRAM_BASE)
 #else
-#define RELATIVE_RO(addr) ((addr) - CONFIG_FLASH_BASE - CONFIG_RO_MEM_OFF)
+#define RELATIVE_RO(addr) ((addr) - CONFIG_PROGRAM_MEMORY_BASE - \
+			   CONFIG_RO_MEM_OFF)
 #endif
 
 struct fmap_header {
@@ -59,7 +60,7 @@ const struct _ec_fmap {
 		.fmap_signature = {'_', '_', 'F', 'M', 'A', 'P', '_', '_'},
 		.fmap_ver_major = FMAP_VER_MAJOR,
 		.fmap_ver_minor = FMAP_VER_MINOR,
-		.fmap_base = CONFIG_FLASH_BASE,
+		.fmap_base = CONFIG_PROGRAM_MEMORY_BASE,
 		.fmap_size = CONFIG_FLASH_SIZE,
 		.fmap_name = "EC_FMAP",
 		.fmap_nareas = NUM_EC_FMAP_AREAS,
diff --git a/common/rwsig.c b/common/rwsig.c
index ef86c19c23..c58e7ab84d 100644
--- a/common/rwsig.c
+++ b/common/rwsig.c
@@ -25,12 +25,13 @@ const struct rsa_public_key pkey __attribute__((section(".rsa_pubkey"))) =
 #include "gen_pub_key.h"
 
 /* The RSA signature is stored at the end of the RW firmware */
-static const void *rw_sig = (void *)CONFIG_FLASH_BASE + CONFIG_RW_MEM_OFF
+static const void *rw_sig = (void *)CONFIG_PROGRAM_MEMORY_BASE
+				 + CONFIG_RW_MEM_OFF
 				 + CONFIG_RW_SIZE - RSANUMBYTES;
 
 /* RW firmware reset vector */
 static uint32_t * const rw_rst =
-	(uint32_t *)(CONFIG_FLASH_BASE+CONFIG_RW_MEM_OFF+4);
+	(uint32_t *)(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RW_MEM_OFF + 4);
 
 void check_rw_signature(void)
 {
@@ -59,7 +60,8 @@ void check_rw_signature(void)
 	/* SHA-256 Hash of the RW firmware */
 	/* TODO(crosbug.com/p/44803): Do we have to hash the whole region? */
 	SHA256_init(&ctx);
-	SHA256_update(&ctx, (void *)CONFIG_FLASH_BASE + CONFIG_RW_MEM_OFF,
+	SHA256_update(&ctx, (void *)CONFIG_PROGRAM_MEMORY_BASE
+		      + CONFIG_RW_MEM_OFF,
 		      CONFIG_RW_SIZE - RSANUMBYTES);
 	hash = SHA256_final(&ctx);
 
diff --git a/common/system.c b/common/system.c
index 42eb91bf71..d617aa39f1 100644
--- a/common/system.c
+++ b/common/system.c
@@ -100,15 +100,11 @@ uint32_t sleep_mask;
  */
 static uintptr_t get_program_memory_addr(enum system_image_copy_t copy)
 {
-	/*
-	 * TODO(crosbug.com/p/23796): CONFIG_FLASH_BASE has overloaded meaning,
-	 * add an explicit CONFIG for program memory base for all boards.
-	 */
 	switch (copy) {
 	case SYSTEM_IMAGE_RO:
-		return CONFIG_FLASH_BASE + CONFIG_RO_MEM_OFF;
+		return CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF;
 	case SYSTEM_IMAGE_RW:
-		return CONFIG_FLASH_BASE + CONFIG_RW_MEM_OFF;
+		return CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RW_MEM_OFF;
 	default:
 		return 0xffffffff;
 	}
@@ -323,7 +319,7 @@ test_mockable enum system_image_copy_t system_get_image_copy(void)
 	return system_get_shrspi_image_copy();
 #else
 	uintptr_t my_addr = (uintptr_t)system_get_image_copy -
-			    CONFIG_FLASH_BASE;
+			    CONFIG_PROGRAM_MEMORY_BASE;
 
 	if (my_addr >= CONFIG_RO_MEM_OFF &&
 	    my_addr < (CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE))
@@ -339,7 +335,7 @@ test_mockable enum system_image_copy_t system_get_image_copy(void)
 
 int system_get_image_used(enum system_image_copy_t copy)
 {
-#if !defined(CONFIG_FLASH_MAPPED) && defined(CONFIG_CODERAM_ARCH)
+#if !defined(CONFIG_MAPPED_STORAGE) && defined(CONFIG_CODERAM_ARCH)
 	int image_offset;
 	uint8_t buf[SPI_FLASH_MAX_WRITE_SIZE];
 #endif
@@ -354,7 +350,7 @@ int system_get_image_used(enum system_image_copy_t copy)
 	 * last byte of the image.  See ec.lds.S for how this is inserted at
 	 * the end of the image.
 	 */
-#if !defined(CONFIG_FLASH_MAPPED) && defined(CONFIG_CODERAM_ARCH)
+#if !defined(CONFIG_MAPPED_STORAGE) && defined(CONFIG_CODERAM_ARCH)
 	image_offset = (copy == SYSTEM_IMAGE_RW) ? CONFIG_RW_STORAGE_OFF :
 			CONFIG_RO_STORAGE_OFF;
 	image = buf;
@@ -542,7 +538,7 @@ int system_run_image_copy(enum system_image_copy_t copy)
 
 const char *system_get_version(enum system_image_copy_t copy)
 {
-#if !defined(CONFIG_FLASH_MAPPED) && defined(CONFIG_CODERAM_ARCH)
+#if !defined(CONFIG_MAPPED_STORAGE) && defined(CONFIG_CODERAM_ARCH)
 	static struct version_struct vdata;
 #endif
 
@@ -564,7 +560,7 @@ const char *system_get_version(enum system_image_copy_t copy)
 	addr = ((uintptr_t)&version_data -
 	       get_program_memory_addr(active_copy));
 #ifdef CONFIG_CODERAM_ARCH
-#ifdef CONFIG_FLASH_MAPPED
+#ifdef CONFIG_MAPPED_STORAGE
 	/* Geometry constants have non-standard meaning for npcx */
 	addr = ((uintptr_t)&version_data - CONFIG_CDRAM_BASE +
 			   get_program_memory_addr(copy));
@@ -576,7 +572,7 @@ const char *system_get_version(enum system_image_copy_t copy)
 	 */
 	addr += (copy == SYSTEM_IMAGE_RW) ? CONFIG_RW_STORAGE_OFF :
 					    CONFIG_RO_STORAGE_OFF;
-#endif /* CONFIG_FLASH_MAPPED */
+#endif /* CONFIG_MAPPED_STORAGE */
 #else /* CONFIG_CODERAM_ARCH */
 	/*
 	 * Read version from program memory, which is always populated with
@@ -585,7 +581,7 @@ const char *system_get_version(enum system_image_copy_t copy)
 	addr += get_program_memory_addr(copy);
 #endif /*CONFIG_CODERAM_ARCH */
 
-#if defined(CONFIG_FLASH_MAPPED) || !defined(CONFIG_CODERAM_ARCH)
+#if defined(CONFIG_MAPPED_STORAGE) || !defined(CONFIG_CODERAM_ARCH)
 	/* Directly access the data from program memory or mapped flash. */
 	v = (const struct version_struct *)addr;
 #else
diff --git a/common/usb_pd_policy.c b/common/usb_pd_policy.c
index 91bbdb15e4..e628e6e556 100644
--- a/common/usb_pd_policy.c
+++ b/common/usb_pd_policy.c
@@ -826,7 +826,7 @@ uint8_t *flash_hash_rw(void)
 	if (rw_flash_changed) {
 		rw_flash_changed = 0;
 		SHA256_init(&ctx);
-		SHA256_update(&ctx, (void *)CONFIG_FLASH_BASE +
+		SHA256_update(&ctx, (void *)CONFIG_PROGRAM_MEMORY_BASE +
 			      CONFIG_RW_MEM_OFF,
 			      CONFIG_RW_SIZE - RSANUMBYTES);
 		return SHA256_final(&ctx);
diff --git a/common/vboot_hash.c b/common/vboot_hash.c
index ff2c56fb59..7726ef7043 100644
--- a/common/vboot_hash.c
+++ b/common/vboot_hash.c
@@ -63,7 +63,7 @@ void vboot_hash_abort(void)
 	}
 }
 
-#ifndef CONFIG_FLASH_MAPPED
+#ifndef CONFIG_MAPPED_STORAGE
 
 static void vboot_hash_next_chunk(void);
 
@@ -111,8 +111,8 @@ static void vboot_hash_next_chunk(void)
 	/* Compute the next chunk of hash */
 	size = MIN(CHUNK_SIZE, data_size - curr_pos);
 
-#ifdef CONFIG_FLASH_MAPPED
-	SHA256_update(&ctx, (const uint8_t *)(CONFIG_FLASH_BASE +
+#ifdef CONFIG_MAPPED_STORAGE
+	SHA256_update(&ctx, (const uint8_t *)(CONFIG_PROGRAM_MEMORY_BASE +
 					      data_offset + curr_pos), size);
 #else
 	if (read_and_hash_chunk(data_offset + curr_pos, size) != EC_SUCCESS)