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| author | Patryk Duda <pdk@semihalf.com> | 2021-06-09 17:32:35 +0200 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-09-06 09:43:53 +0000 |
| commit | c2b7a7dd3eb4c96bc35904ba0d5cb874ec60178c (patch) | |
| tree | 91fc624105674c0252be19eb15b2e1be41b96821 /common | |
| parent | bc257547d8d819af64d6e90341900e23030151c0 (diff) | |
| download | chrome-ec-c2b7a7dd3eb4c96bc35904ba0d5cb874ec60178c.tar.gz | |
uart_buffering: Process UART TX explicitly when disabled interrupt
When interrupts are disabled we should follow the same path like in
case when we are in interrupt context. This will fix infinite loop when
calling uart_flush_output() (eg. when ASSERT is triggered) with disabled
interrupts
BUG=b:190597666
BRANCH=none
TEST=Trigger ASSERT when interrupts are disabled. Make sure that panic
message is shown. Perform this test on following cores:
cortex-m - this is the most common core, eg. bloonchipper
minute-ia - this is used for Intel Sensor Hub (cros_ish)
eg. drallion board
riscv-rv32i - hayato (asurada family) has EC chip based on risc-v
nds32 - ampton (octopus family) has EC chip based on it
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: If88881c6444a40a9c6459d8a6ff42f3ad4c4d750
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953234
Commit-Queue: Marcin Wojtas <mwojtas@google.com>
Tested-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'common')
| -rw-r--r-- | common/uart_buffering.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/common/uart_buffering.c b/common/uart_buffering.c index 677c72a718..a6798bb671 100644 --- a/common/uart_buffering.c +++ b/common/uart_buffering.c @@ -261,7 +261,7 @@ void uart_flush_output(void) /* Loop until buffer is empty */ while (tx_buf_head != tx_buf_tail) { - if (in_interrupt_context()) { + if (in_interrupt_context() || !is_interrupt_enabled()) { /* * Explicitly process UART output, since the UART * interrupt may not be able to preempt the interrupt |