diff options
author | Diana Z <dzigterman@chromium.org> | 2021-09-14 15:09:36 -0600 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-09-15 22:44:06 +0000 |
commit | f1d74823bf0d3d5eefc945a5b55f9435dad81f6b (patch) | |
tree | d9f1f8a5d87a20c4b5bed73134df279c55fe84a8 /common | |
parent | f47bf498f741c04bdfdd6b961f4e579f34279096 (diff) | |
download | chrome-ec-f1d74823bf0d3d5eefc945a5b55f9435dad81f6b.tar.gz |
TCPMv2: Hard reset when we've dropped Vconn
Many Chromebooks will stop sourcing Vconn in G3, and don't have
sufficient notice during chipset transitions to properly swap Vconn back
to the partner before it is dropped. For these cases, send a hard reset
in order to move the role of Vconn supplier back to the source.
Note that some boards use GPIO checks to verify whether they can source
Vconn, and these could take some amount of time after G3 entry to
settle.
BRANCH=None
BUG=b:199044441
TEST=on guybrush, attach a charger which will not swap Vconn and observe
no hard resets are sent in G3. Attach charger which does Vconn swap and
observe a hard reset is sent, and the cable is probed once the system is
powered on again.
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ia1c9533c36c6c7a650109182c5adf8444ffde43a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3161320
Tested-by: Li Feng <li1.feng@intel.com>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Diffstat (limited to 'common')
-rw-r--r-- | common/usbc/usb_tc_drp_acc_trysrc_sm.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/common/usbc/usb_tc_drp_acc_trysrc_sm.c b/common/usbc/usb_tc_drp_acc_trysrc_sm.c index 041c3c7187..bf7d69bf13 100644 --- a/common/usbc/usb_tc_drp_acc_trysrc_sm.c +++ b/common/usbc/usb_tc_drp_acc_trysrc_sm.c @@ -1887,6 +1887,16 @@ __maybe_unused static void handle_new_power_state(int port) } /* + * If the sink port was sourcing Vconn, and can no longer, request a + * hard reset on this port to restore Vconn to the source. + */ + if (IS_ENABLED(CONFIG_USB_PE_SM)) { + if (tc_is_vconn_src(port) && tc_is_attached_snk(port) && + !pd_check_vconn_swap(port)) + pd_dpm_request(port, DPM_REQUEST_HARD_RESET_SEND); + } + + /* * TC_FLAGS_UPDATE_USB_MUX is set on chipset startup and shutdown. * Set the USB mux according to the new power state. If the chipset * is transitioning to OFF, this disconnects USB and DP mux. @@ -3995,6 +4005,27 @@ static void pd_chipset_shutdown(void) } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, pd_chipset_shutdown, HOOK_PRIO_DEFAULT); +static void pd_set_power_change(void) +{ + int i; + + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + task_set_event(PD_PORT_TO_TASK_ID(i), + PD_EVENT_POWER_STATE_CHANGE); + } +} +DECLARE_DEFERRED(pd_set_power_change); + +static void pd_chipset_hard_off(void) +{ + /* + * Wait 1 second to check our Vconn sourcing status, as the power rails + * which were supporting it may take some time to change after entering + * G3. + */ + hook_call_deferred(&pd_set_power_change_data, 1 * SECOND); +} +DECLARE_HOOK(HOOK_CHIPSET_HARD_OFF, pd_chipset_hard_off, HOOK_PRIO_DEFAULT); /* * Type-C State Hierarchy (Sub-States are listed inside the boxes) |