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| author | Tom Hughes <tomhughes@chromium.org> | 2020-05-13 15:20:08 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-05-22 03:31:56 +0000 |
| commit | 288e1a5d8ea9be1e15829067969cc786d725a4a4 (patch) | |
| tree | fef788b8b875b8fef2760bb5e04f6a0896f67ead /core/cortex-m/include | |
| parent | 092918a531ec535a12db6bdf01af3d1b782630f5 (diff) | |
| download | chrome-ec-288e1a5d8ea9be1e15829067969cc786d725a4a4.tar.gz | |
cortex-m: Clean up MPU logic
Add error checking for failures and use IS_ENABLED combined with helper
functions for readability.
BRANCH=none
BUG=b:155229277, b:156501835
TEST=Compile and flash "rollback" test on dragonclaw with region 0
On console: "runtest"
=> Reboots with "Data access violation, mfar = 8020000"
=> PASS
TEST=Compile and flash "rollback" test on dragonclaw with region 1
On console: "runtest"
=> Memory is successfully read
=> FAIL
TEST=Compile and flash "rollback" test on dragontalon with region 0
On console: "runtest"
=> Reboots with "Data access violation, mfar = 80c0000"
=> PASS
TEST=Compile and flash "rollback" on dragontalon with region 1
On console: "runtest"
=> Reboots with "Data access violation, mfar = 80e0000"
=> PASS
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I0f8d149c8c5c568241457a6779079c65eb38ce32
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2200199
Commit-Queue: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'core/cortex-m/include')
| -rw-r--r-- | core/cortex-m/include/mpu.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/core/cortex-m/include/mpu.h b/core/cortex-m/include/mpu.h index 62e9b8bbec..17539fa09e 100644 --- a/core/cortex-m/include/mpu.h +++ b/core/cortex-m/include/mpu.h @@ -42,6 +42,10 @@ enum mpu_region { #define MPU_SIZE REG16(0xe000eda0) #define MPU_ATTR REG16(0xe000eda2) +/* + * See ARM v7-M Architecture Reference Manual + * Section B3.5.5 MPU Type Register, MPU_TYPE + */ #define MPU_TYPE_UNIFIED_MASK 0x00FF0001 #define MPU_TYPE_REG_COUNT(t) (((t) >> 8) & 0xFF) |