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authorTom Hughes <tomhughes@chromium.org>2020-05-13 15:30:03 -0700
committerCommit Bot <commit-bot@chromium.org>2020-05-22 19:22:02 +0000
commitda723da31208d9730c99903b3eef04c7600c22bb (patch)
tree57bb616fa170b39f127829d94de3b8e5d77166c6 /core/cortex-m/mpu.c
parent38df3878f8d7d4bc149faaa0884f0ded501b491c (diff)
downloadchrome-ec-da723da31208d9730c99903b3eef04c7600c22bb.tar.gz
cortex-m: Always enable MPU in mpu_pre_init
The MPU was only being enabled when CONFIG_ARMV7_CACHE and CONFIG_CHIP_UNCACHED_REGION were enabled; these are enabled for the STM32H743 (dartmonkey), but not the STM32F412 (bloonchipper). BRANCH=none BUG=b:155229277, b:156501835 TEST=Compile and flash "rollback" test on dragonclaw with region 0 On console: "runtest" => Reboots with "Data access violation, mfar = 8020000" => PASS TEST=Compile and flash "rollback" test on dragonclaw with region 1 On console: "runtest" => Reboots with "Data access violation, mfar = 8040000" => PASS TEST=Compile and flash "rollback" test on dragontalon with region 0 On console: "runtest" => Reboots with "Data access violation, mfar = 80c0000" => PASS TEST=Compile and flash "rollback" test on dragontalon with region 1 On console: "runtest" => Reboots with "Data access violation, mfar = 80e0000" => PASS Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I7bca3864205bd1dd6797732aa903bc3bc325ac6f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2200201 Commit-Queue: Yicheng Li <yichengli@chromium.org> Tested-by: Yicheng Li <yichengli@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Diffstat (limited to 'core/cortex-m/mpu.c')
-rw-r--r--core/cortex-m/mpu.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/core/cortex-m/mpu.c b/core/cortex-m/mpu.c
index f16e6ca0da..ed7180c9a8 100644
--- a/core/cortex-m/mpu.c
+++ b/core/cortex-m/mpu.c
@@ -345,10 +345,13 @@ int mpu_pre_init(void)
if (rv != EC_SUCCESS)
return rv;
- mpu_enable();
#endif
- cpu_enable_caches();
}
+ mpu_enable();
+
+ if (IS_ENABLED(CONFIG_ARMV7M_CACHE))
+ cpu_enable_caches();
+
return EC_SUCCESS;
}