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authorPatryk Duda <pdk@semihalf.com>2021-06-10 12:52:06 +0200
committerCommit Bot <commit-bot@chromium.org>2021-09-06 09:43:44 +0000
commitb7b266b58035b4a24d6e5ec93ee775e6229e7929 (patch)
treee5449e28adc29e7ab6e9357bb3e809ee9f975574 /core/cortex-m/task.c
parenta6431b48d17d39a23c24cfbf4f836d63cfe9f82e (diff)
downloadchrome-ec-b7b266b58035b4a24d6e5ec93ee775e6229e7929.tar.gz
Provide 'is_interrupt_enabled' function for all cores
Add a function that will provide information if interrupts are enabled. This information will be used to fix shortcomings in common code for UART buffering and usleep(). BUG=b:190597666 BRANCH=none TEST=make -j buildall TEST=make runhosttests TEST=Note for running tests: this patch only adds function implementation so, to test this it is necessary to add some code which uses the function eg. console command which prints information if interrupt is enabled. Minute-ia core: It is necessary to compile firmware for ISH (Intel Sensor Hub) which is available on drallion board (eg. chromeos6-row1-rack9-host19). Firmware must be placed in /lib/firmware/intel/drallion_ish.bin (partition must be writeable, if not use /usr/share/vboot/bin/make_dev_ssd.sh on DUT tu unlock it, don't forget about reboot). After copying firmware to /lib/firmware/intel/ it is necessary to reboot DUT. After reboot use `ectool --name=cros_ish version` to check if correct version is running. NDS32 core. This core is used in it8320dx chip which is present in ampton (octopus family). EC can be compiled using 'make BOARD=ampton' and flashed using 'chromeos-firmwareupdate -e ec.bin', but EC software sync needs to be disabled using 'set_gbb_flags.sh 0x200' Riscv-rv32i core, hayato (asurada family) uses it81202 as EC which is based on risc-v. EC can be compiled using 'make BOARD=hayato' and flashed using 'chromeos-firmwareupdate -e ec.bin', but EC software sync needs to be disabled using 'set_gbb_flags.sh 0x200' Cortex-M, this is the most common core. Just compile EC for platform which contains Cortex-M core (eg. bloonchipper) and test if it works. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I502553cd57e6ce897d5845a3aad01a44a9058405 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953227 Commit-Queue: Marcin Wojtas <mwojtas@google.com> Tested-by: Patryk Duda <patrykd@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'core/cortex-m/task.c')
-rw-r--r--core/cortex-m/task.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/core/cortex-m/task.c b/core/cortex-m/task.c
index b88baf4511..e64063dc15 100644
--- a/core/cortex-m/task.c
+++ b/core/cortex-m/task.c
@@ -227,6 +227,16 @@ void interrupt_enable(void)
asm("cpsie i");
}
+inline int is_interrupt_enabled(void)
+{
+ int primask;
+
+ /* Interrupts are enabled when PRIMASK bit is 0 */
+ asm("mrs %0, primask":"=r"(primask));
+
+ return !(primask & 0x1);
+}
+
inline int in_interrupt_context(void)
{
int ret;