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| author | Tom Hughes <tomhughes@chromium.org> | 2021-02-19 15:02:23 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-02-23 21:42:25 +0000 |
| commit | 6d79f593f5077700dd773bd3b54405d9b9a123db (patch) | |
| tree | 25ab0a5b059da1638b0f516f07585cca48898329 /core/cortex-m0/build.mk | |
| parent | a5a81dca4579961b9d78c7c85442d76b3c87dbbb (diff) | |
| download | chrome-ec-6d79f593f5077700dd773bd3b54405d9b9a123db.tar.gz | |
cortex-m/m0: Add Debug Halting Control and Status Register
For Cortex-M0, see "C1.6.3 Debug Halting Control and Status Register,
DHCSR" in the ARMv6-M Architecture Reference Manual.
For other Cortex-M, see "C1.6.2 Debug Halting Control and Status
Register, DHCSR" in the ARMv7-M Architecture Reference Manual or
https://developer.arm.com/documentation/ddi0337/e/core-debug/core-debug-registers/debug-halting-control-and-status-register.
BRANCH=none
BUG=b:180144572
TEST=Using Segger J-Trace Pro with icetower v0.1, verify
debugger_is_connected is true when debugger is attached and false
otherwise
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I748fc26c0db4351be5a83086fdb843e5651b5425
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713753
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'core/cortex-m0/build.mk')
| -rw-r--r-- | core/cortex-m0/build.mk | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/core/cortex-m0/build.mk b/core/cortex-m0/build.mk index a314976bce..b0136f347e 100644 --- a/core/cortex-m0/build.mk +++ b/core/cortex-m0/build.mk @@ -20,7 +20,7 @@ CFLAGS_CPU+=-flto LDFLAGS_EXTRA+=-flto endif -core-y=cpu.o init.o thumb_case.o div.o lmul.o ldivmod.o mula.o uldivmod.o +core-y=cpu.o debug.o init.o thumb_case.o div.o lmul.o ldivmod.o mula.o uldivmod.o core-y+=vecttable.o __builtin.o core-$(CONFIG_COMMON_PANIC_OUTPUT)+=panic.o core-$(CONFIG_COMMON_RUNTIME)+=switch.o task.o |