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| author | Bill Richardson <wfrichar@chromium.org> | 2015-05-29 13:29:43 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-05-29 23:57:52 +0000 |
| commit | 41533aab3acc068945bcaa1da28ffdaddc65b5ff (patch) | |
| tree | 55416a1f29f24e1f8012c41df7d8be2b6f9eae2a /core/cortex-m0/ec.lds.S | |
| parent | eaf2f26831e09bdd9b3ec6009beb6c7ab449ce76 (diff) | |
| download | chrome-ec-41533aab3acc068945bcaa1da28ffdaddc65b5ff.tar.gz | |
Cr50: USB hardware uses 8-bit buffers, not 16-bit
Our USB buffers are just arrays of uint8_t in program RAM, so
let's treat them that way. The DMA descriptors are in normal RAM,
too.
BUG=chrome-os-partner:40693
BRANCH=none
TEST=make buildall
Change-Id: Ibafe1a557a328bbf8cf37ce113675fcd35bad376
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/273918
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'core/cortex-m0/ec.lds.S')
| -rw-r--r-- | core/cortex-m0/ec.lds.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/core/cortex-m0/ec.lds.S b/core/cortex-m0/ec.lds.S index a61add0276..48144a4b9d 100644 --- a/core/cortex-m0/ec.lds.S +++ b/core/cortex-m0/ec.lds.S @@ -23,7 +23,7 @@ MEMORY PSTATE(r) : ORIGIN = FW_OFF(SECTION) + FW_SIZE(SECTION), \ LENGTH = CONFIG_FW_PSTATE_SIZE #endif -#ifdef CONFIG_USB +#ifdef CONFIG_USB_RAM_SIZE USB_RAM (rw) : \ ORIGIN = CONFIG_USB_RAM_BASE, \ LENGTH = CONFIG_USB_RAM_SIZE * CONFIG_USB_RAM_ACCESS_SIZE / 2 @@ -246,7 +246,7 @@ SECTIONS (LOADADDR(.data) + SIZEOF(.data) - FW_OFF(SECTION)), "No room left in the flash") -#ifdef CONFIG_USB +#ifdef CONFIG_USB_RAM_SIZE .usb_ram (NOLOAD) : { __usb_ram_start = .; . = ALIGN(8); |