diff options
| author | Vic Yang <victoryang@chromium.org> | 2014-10-17 15:13:37 -0700 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-10-21 00:44:39 +0000 |
| commit | 959dcf9854cc6267a1e7ab642dadadacdc7c3ff7 (patch) | |
| tree | 386a2182eabd3a3bc9e889d49d66e54819832e27 /core/cortex-m0/irq_handler.h | |
| parent | d0d6befc3f1195f993e22dfff97b16f6657f3dcc (diff) | |
| download | chrome-ec-959dcf9854cc6267a1e7ab642dadadacdc7c3ff7.tar.gz | |
stm32f: Add DMA interrupt handlers for channel 1 to 3
We already have interrupt handlers for channel 4 to 7. We need channel 3
for the new Ryu boards. Add the handlers for channel 1 to 3. Also,
instead of copy-pasting interrupt handlers, define a macro and declare
interrupt handlers with it.
BRANCH=None
BUG=chrome-os-partner:32660
TEST=make buildall
TEST=Check PD communication on the new Ryu board (with other CLs to
enable the new boards.)
Change-Id: I51d6bd16739f31a7efbeb4ec19bb91a1546fe21d
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/224175
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'core/cortex-m0/irq_handler.h')
| -rw-r--r-- | core/cortex-m0/irq_handler.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/core/cortex-m0/irq_handler.h b/core/cortex-m0/irq_handler.h index 77816949d0..442c20ac00 100644 --- a/core/cortex-m0/irq_handler.h +++ b/core/cortex-m0/irq_handler.h @@ -25,7 +25,8 @@ extern int need_resched_or_profiling; * Macro to connect the interrupt handler "routine" to the irq number "irq" and * ensure it is enabled in the interrupt controller with the right priority. */ -#define DECLARE_IRQ(irq, routine, priority) \ +#define DECLARE_IRQ(irq, routine, priority) DECLARE_IRQ_(irq, routine, priority) +#define DECLARE_IRQ_(irq, routine, priority) \ void IRQ_HANDLER(irq)(void) __attribute__((naked)); \ void IRQ_HANDLER(irq)(void) \ { \ |