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| author | Peter Marheine <pmarheine@chromium.org> | 2020-05-11 11:49:38 +1000 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-05-19 08:46:37 +0000 |
| commit | 6ce2d3106156c2ea3e51b8a088fd6b66a2397eb9 (patch) | |
| tree | d3789d0ad187b546febc8121f9281fd225959c1e /core/cortex-m0 | |
| parent | 5e32f948d370fff182616bd987ffdc794f6858a6 (diff) | |
| download | chrome-ec-6ce2d3106156c2ea3e51b8a088fd6b66a2397eb9.tar.gz | |
cortex-m: provide a function to set IRQ priority
On Puff we need to increase some IRQ priorities to meet strict timing
requirements. To support that, provide a function encapsulating the bit
manipulations to adjust the priority of a single IRQ and update task.c
to take advantage of it.
BUG=None
BRANCH=None
TEST=Still builds.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I9534f5733db48b9650a55f30e5209918a5eb24b1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2192456
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Diffstat (limited to 'core/cortex-m0')
| -rw-r--r-- | core/cortex-m0/cpu.h | 14 | ||||
| -rw-r--r-- | core/cortex-m0/task.c | 11 |
2 files changed, 16 insertions, 9 deletions
diff --git a/core/cortex-m0/cpu.h b/core/cortex-m0/cpu.h index ba27c1bc82..ac184090f9 100644 --- a/core/cortex-m0/cpu.h +++ b/core/cortex-m0/cpu.h @@ -41,4 +41,18 @@ /* Set up the cpu to detect faults */ void cpu_init(void); +/* Set the priority of the given IRQ in the NVIC (0 is highest). */ +static inline void cpu_set_interrupt_priority(uint8_t irq, uint8_t priority) +{ + const uint32_t prio_shift = irq % 4 * 8 + 6; + + if (priority > 3) + priority = 3; + + CPU_NVIC_PRI(irq / 4) = + (CPU_NVIC_PRI(irq / 4) & + ~(3 << prio_shift)) | + (priority << prio_shift); +} + #endif /* __CROS_EC_CPU_H */ diff --git a/core/cortex-m0/task.c b/core/cortex-m0/task.c index ead2bff49f..1d085431ac 100644 --- a/core/cortex-m0/task.c +++ b/core/cortex-m0/task.c @@ -489,15 +489,8 @@ static void __nvic_init_irqs(void) /* Set priorities */ for (i = 0; i < exc_calls; i++) { - uint8_t irq = __irqprio[i].irq; - uint8_t prio = __irqprio[i].priority; - uint32_t prio_shift = irq % 4 * 8 + 6; - if (prio > 0x3) - prio = 0x3; - CPU_NVIC_PRI(irq / 4) = - (CPU_NVIC_PRI(irq / 4) & - ~(0x3 << prio_shift)) | - (prio << prio_shift); + cpu_set_interrupt_priority(__irqprio[i].irq, + __irqprio[i].priority); } } |