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authorDawid Niedzwiecki <dn@semihalf.com>2020-10-28 09:40:57 +0100
committerCommit Bot <commit-bot@chromium.org>2020-10-30 07:03:12 +0000
commit9b1733d659d764140c825c0f32dab43de27410be (patch)
tree79774bb583961265bde08fb6cf710af170143e33 /core/cortex-m0
parentdeef4e1aa7c347740e6c12e2ca3d6893ec19c2fb (diff)
downloadchrome-ec-9b1733d659d764140c825c0f32dab43de27410be.tar.gz
atomic: remove deprecated atomic functions
Remove deprecated_atomic_* functions since only atomic_* are now used. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I6b25cc81aec126662ed779cf0f9309dcb77a754e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2505142 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'core/cortex-m0')
-rw-r--r--core/cortex-m0/atomic.h56
1 files changed, 0 insertions, 56 deletions
diff --git a/core/cortex-m0/atomic.h b/core/cortex-m0/atomic.h
index 539117a672..ad07beee35 100644
--- a/core/cortex-m0/atomic.h
+++ b/core/cortex-m0/atomic.h
@@ -18,18 +18,6 @@ typedef atomic_t atomic_val_t;
*
* There is no load/store exclusive on ARMv6-M, just disable interrupts
*/
-#define DEPRECATED_ATOMIC_OP(asm_op, a, v) do { \
- uint32_t reg0; \
- \
- __asm__ __volatile__(" cpsid i\n" \
- " ldr %0, [%1]\n" \
- #asm_op" %0, %0, %2\n" \
- " str %0, [%1]\n" \
- " cpsie i\n" \
- : "=&b" (reg0) \
- : "b" (a), "r" (v) : "cc"); \
-} while (0)
-
#define ATOMIC_OP(asm_op, a, v) \
({ \
uint32_t reg0, reg1; \
@@ -46,70 +34,26 @@ typedef atomic_t atomic_val_t;
reg1; \
})
-/*
- * The atomic_* functions are marked as deprecated as a part of the process of
- * transaction to Zephyr compatible atomic functions. These prefixes will be
- * removed in the following patches. Please see b:169151160 for more details.
- */
-
-static inline void deprecated_atomic_clear_bits(uint32_t volatile *addr,
- uint32_t bits)
-{
- DEPRECATED_ATOMIC_OP(bic, addr, bits);
-}
-
static inline void atomic_clear_bits(atomic_t *addr, atomic_val_t bits)
{
ATOMIC_OP(bic, addr, bits);
}
-static inline void deprecated_atomic_or(uint32_t volatile *addr, uint32_t bits)
-{
- DEPRECATED_ATOMIC_OP(orr, addr, bits);
-}
-
static inline atomic_val_t atomic_or(atomic_t *addr, atomic_val_t bits)
{
return ATOMIC_OP(orr, addr, bits);
}
-static inline void deprecated_atomic_add(uint32_t volatile *addr,
- uint32_t value)
-{
- DEPRECATED_ATOMIC_OP(add, addr, value);
-}
-
static inline atomic_val_t atomic_add(atomic_t *addr, atomic_val_t value)
{
return ATOMIC_OP(add, addr, value);
}
-static inline void deprecated_atomic_sub(uint32_t volatile *addr,
- uint32_t value)
-{
- DEPRECATED_ATOMIC_OP(sub, addr, value);
-}
-
static inline atomic_val_t atomic_sub(atomic_t *addr, atomic_val_t value)
{
return ATOMIC_OP(sub, addr, value);
}
-static inline uint32_t deprecated_atomic_read_clear(uint32_t volatile *addr)
-{
- uint32_t ret;
-
- __asm__ __volatile__(" mov %2, #0\n"
- " cpsid i\n"
- " ldr %0, [%1]\n"
- " str %2, [%1]\n"
- " cpsie i\n"
- : "=&b" (ret)
- : "b" (addr), "r" (0) : "cc");
-
- return ret;
-}
-
static inline atomic_val_t atomic_read_clear(atomic_t *addr)
{
atomic_t ret;