diff options
| author | Vincent Palatin <vpalatin@chromium.org> | 2014-11-11 10:19:38 -0800 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-11-15 06:00:02 +0000 |
| commit | b63b0d70f53ac1e6f500da0b10ac66d96299a22b (patch) | |
| tree | 2544d109f1a8d954aad70782c17bb7777b0c8c3d /core/cortex-m0 | |
| parent | 9de2ef515fd8c534e6ff4dddee0c2b9f5ec012f2 (diff) | |
| download | chrome-ec-b63b0d70f53ac1e6f500da0b10ac66d96299a22b.tar.gz | |
rsa: add support for 4096 and 8192 bit keys
Allow to use larger RSA keys by setting CONFIG_RSA_KEY_SIZE to 4096 or
8192 rather than using the default 2048-bit size.
It's mainly for benchmarking purpose right now as we don't have the RAM
to store the 3x key size buffer and the flash space for the public key
structure.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=none
TEST=build Zinger with CONFIG_RSA_KEY_SIZE equals to 4096 and run it.
Change-Id: I9839121bf158d0a30dde1e48d875f345191bfec2
Reviewed-on: https://chromium-review.googlesource.com/228925
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'core/cortex-m0')
| -rw-r--r-- | core/cortex-m0/ec.lds.S | 22 |
1 files changed, 19 insertions, 3 deletions
diff --git a/core/cortex-m0/ec.lds.S b/core/cortex-m0/ec.lds.S index a72193a7ae..4a4ddd23f4 100644 --- a/core/cortex-m0/ec.lds.S +++ b/core/cortex-m0/ec.lds.S @@ -3,6 +3,7 @@ * found in the LICENSE file. */ #include "config.h" +#include "rsa.h" #define FW_OFF_(section) CONFIG_FW_##section##_OFF #define FW_OFF(section) (CONFIG_FLASH_BASE + FW_OFF_(section)) @@ -18,6 +19,10 @@ MEMORY { FLASH (rx) : ORIGIN = FW_OFF(SECTION), LENGTH = FW_SIZE(SECTION) IRAM (rw) : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE +#ifdef RSA_PUBLIC_KEY_SIZE + PSTATE(r) : ORIGIN = FW_OFF(SECTION) + FW_SIZE(SECTION), \ + LENGTH = CONFIG_FW_PSTATE_SIZE +#endif #ifdef CONFIG_USB USB_RAM (rw) : \ ORIGIN = CONFIG_USB_RAM_BASE, \ @@ -204,12 +209,23 @@ SECTIONS /* NOTHING MAY GO AFTER THIS! */ } > IRAM - .flash_suffix : AT(LOADADDR(.data) + SIZEOF(.data)) { +#ifdef RSA_PUBLIC_KEY_SIZE +#ifdef SECTION_IS_RO + .flash_suffix : { FILL(0xff); - /* Put the public key coefficients at the end of the partition */ - . = ORIGIN(FLASH) + LENGTH(FLASH) - 528; + /* + * Put the public key coefficients at the end of the partition + * after the pstate bits. + */ + . = ORIGIN(PSTATE) + LENGTH(PSTATE) - RSA_PUBLIC_KEY_SIZE; + *(.rsa_pubkey) + } > PSTATE +#else /* RW section: we don't need the RSA public key, put it anywhere */ + .flash_suffix : AT(LOADADDR(.data) + SIZEOF(.data)) { *(.rsa_pubkey) } > FLASH +#endif +#endif /* The linker won't notice if the .data section is too big to fit, * apparently because we're sending it into IRAM, not FLASH. The following |