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authorRandall Spangler <rspangler@chromium.org>2013-12-17 13:43:17 -0800
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2013-12-19 00:12:28 +0000
commit6ab8e91658f1efc894b648cc0748af8d804915e4 (patch)
treec33da7914793452ecb37084e505230171d4eff9e /core/cortex-m
parente5935f17d1798a1f19c6003e57f140446774484f (diff)
downloadchrome-ec-6ab8e91658f1efc894b648cc0748af8d804915e4.tar.gz
cleanup: Remove checkpatch warnings
This make minor syntactic changes and renames some camel-cased symbols to keep checkpatch from complaining. The goal is to reduce the temptation to use 'repo upload --no-verify'. This is a big furball of find/replace, but no functional changes. BUG=chromium:322144 BRANCH=none TEST=build all boards; pass unit tests Change-Id: I0269b7dd95836ef9a6e33f88c003ab0f24f842a0 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/180495
Diffstat (limited to 'core/cortex-m')
-rw-r--r--core/cortex-m/atomic.h30
-rw-r--r--core/cortex-m/mpu.c3
-rw-r--r--core/cortex-m/task.c7
3 files changed, 19 insertions, 21 deletions
diff --git a/core/cortex-m/atomic.h b/core/cortex-m/atomic.h
index 9e214a41a2..489db51357 100644
--- a/core/cortex-m/atomic.h
+++ b/core/cortex-m/atomic.h
@@ -18,17 +18,17 @@
* you must either clear explicitly the exclusive monitor (using clrex)
* or do it in exception context (which clears the monitor).
*/
-#define ATOMIC_OP(asm_op,a,v) do { \
+#define ATOMIC_OP(asm_op, a, v) do { \
uint32_t reg0, reg1; \
- \
+ \
__asm__ __volatile__("1: ldrex %0, [%2]\n" \
- #asm_op" %0, %0, %3\n" \
- " strex %1, %0, [%2]\n" \
- " teq %1, #0\n" \
- " bne 1b" \
- : "=&r" (reg0), "=&r" (reg1) \
- : "r" (a), "r" (v) : "cc"); \
-} while (0);
+ #asm_op" %0, %0, %3\n" \
+ " strex %1, %0, [%2]\n" \
+ " teq %1, #0\n" \
+ " bne 1b" \
+ : "=&r" (reg0), "=&r" (reg1) \
+ : "r" (a), "r" (v) : "cc"); \
+} while (0)
static inline void atomic_clear(uint32_t *addr, uint32_t bits)
{
@@ -55,12 +55,12 @@ static inline uint32_t atomic_read_clear(uint32_t *addr)
uint32_t ret, tmp;
__asm__ __volatile__(" mov %3, #0\n"
- "1: ldrex %0, [%2]\n"
- " strex %1, %3, [%2]\n"
- " teq %1, #0\n"
- " bne 1b"
- : "=&r" (ret), "=&r" (tmp)
- : "r" (addr), "r" (0) : "cc");
+ "1: ldrex %0, [%2]\n"
+ " strex %1, %3, [%2]\n"
+ " teq %1, #0\n"
+ " bne 1b"
+ : "=&r" (ret), "=&r" (tmp)
+ : "r" (addr), "r" (0) : "cc");
return ret;
}
diff --git a/core/cortex-m/mpu.c b/core/cortex-m/mpu.c
index b8f2ca8def..7b4deaa0a9 100644
--- a/core/cortex-m/mpu.c
+++ b/core/cortex-m/mpu.c
@@ -158,9 +158,8 @@ int mpu_pre_init(void)
return EC_ERROR_UNIMPLEMENTED;
mpu_disable();
- for (i = 0; i < 8; ++i) {
+ for (i = 0; i < 8; ++i)
mpu_config_region(i, CONFIG_RAM_BASE, CONFIG_RAM_SIZE, 0, 0);
- }
return EC_SUCCESS;
}
diff --git a/core/cortex-m/task.c b/core/cortex-m/task.c
index 5ef72e64b0..c0cbc84d59 100644
--- a/core/cortex-m/task.c
+++ b/core/cortex-m/task.c
@@ -113,7 +113,7 @@ uint8_t task_stacks[0
TASK(IDLE, __idle, 0, IDLE_TASK_STACK_SIZE)
CONFIG_TASK_LIST
CONFIG_TEST_TASK_LIST
-] __attribute__((aligned(8)));
+] __aligned(8);
#undef TASK
@@ -137,7 +137,7 @@ static task_ *current_task = (task_ *)scratchpad;
* task unblocking. After checking for a task switch, svc_handler() will clear
* the flag (unless profiling is also enabled; then the flag remains set).
*/
-static int need_resched_or_profiling = 0;
+static int need_resched_or_profiling;
/*
* Bitmap of all tasks ready to be run.
@@ -340,8 +340,7 @@ static uint32_t __wait_evt(int timeout_us, task_id_t resched)
ret = timer_arm(deadline, me);
ASSERT(ret == EC_SUCCESS);
}
- while (!(evt = atomic_read_clear(&tsk->events)))
- {
+ while (!(evt = atomic_read_clear(&tsk->events))) {
/* Remove ourself and get the next task in the scheduler */
__schedule(1, resched);
resched = TASK_ID_IDLE;