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| author | yangcao <yang.a.cao@intel.com> | 2019-02-18 15:29:12 +0800 |
|---|---|---|
| committer | Jett Rink <jettrink@chromium.org> | 2019-02-26 14:32:39 +0000 |
| commit | 456d85195c3ceede52d4c219dfccc51f67b78544 (patch) | |
| tree | 30bb78da742d08083cb26996a5809b2874daa947 /core/minute-ia/interrupts.c | |
| parent | 8df604fec43740653366a79f53ec6378b97255f9 (diff) | |
| download | chrome-ec-456d85195c3ceede52d4c219dfccc51f67b78544.tar.gz | |
ish: add reset prep interrupt handle
Upon reset prep interrupt from PMC, ISH HW will do warm reset.
Before full stack of power management in place, this workaround will
help fix S5 issue.
BRANCH=none
BUG=b:123528909
TEST=run "reboot" from host, ISH reboots too.
Change-Id: I421ec25a198eb91672ffe770566a4edbe4855fee
Signed-off-by: yangcao <yang.a.cao@intel.com>
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/1476299
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Diffstat (limited to 'core/minute-ia/interrupts.c')
| -rw-r--r-- | core/minute-ia/interrupts.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/core/minute-ia/interrupts.c b/core/minute-ia/interrupts.c index ee9a9c981c..3ede039bcc 100644 --- a/core/minute-ia/interrupts.c +++ b/core/minute-ia/interrupts.c @@ -76,6 +76,7 @@ static const irq_desc_t system_irqs[] = { LEVEL_INTR(ISH_HPET_TIMER0_IRQ, ISH_HPET_TIMER0_VEC), LEVEL_INTR(ISH_HPET_TIMER1_IRQ, ISH_HPET_TIMER1_VEC), LEVEL_INTR(ISH_DEBUG_UART_IRQ, ISH_DEBUG_UART_VEC), + LEVEL_INTR(ISH_RESET_PREP_IRQ, ISH_RESET_PREP_VEC), }; |