ish: fix s/w generated interrupt request

Current s/w generated IRQ uses LAPIC's ICR but it causes pending
interrupts for other IRQs in IOAPIC and leads LVT error with
illegal vector. So instead of using ICR, we use "int" instruction.

BRANCH=none
BUG=b:129937881,b:124128140
TEST=Tested on Arcada platform

Change-Id: I49c4120e7355f9a98d20d5ed259c4fdf6bad5196
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1568786
Commit-Ready: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>

1 files changed, 25 insertions, 64 deletions

diff --git a/core/minute-ia/irq_handler.h b/core/minute-ia/irq_handler.h
index b691dc71fb..1d44a577bd 100644
--- a/core/minute-ia/irq_handler.h
+++ b/core/minute-ia/irq_handler.h
@@ -11,35 +11,11 @@
 #include "registers.h"
 #include "task_defs.h"
 
-#ifdef CONFIG_FPU
-#define save_fpu_ctx	"movl "USE_FPU_OFFSET_STR"(%eax), %ebx\n"	\
-			"test %ebx, %ebx\n"				\
-			"jz 9f\n"					\
-			"fnsave "FPU_CTX_OFFSET_STR"(%eax)\n"		\
-			"9:\n"
-
-#define rstr_fpu_ctx	"movl "USE_FPU_OFFSET_STR"(%eax), %ebx\n"	\
-			"test %ebx, %ebx\n"				\
-			"jz 9f\n"					\
-			"frstor "FPU_CTX_OFFSET_STR"(%eax)\n"		\
-			"9:\n"
-#else
-#define save_fpu_ctx
-#define rstr_fpu_ctx
-#endif
-
-#ifdef CONFIG_TASK_PROFILING
-#define task_start_irq_handler_call(vector) \
-			"push $"#vector"\n"	\
-			"call task_start_irq_handler\n"	\
-			"addl $0x4, %esp\n"
-#else
-#define task_start_irq_handler_call(vector)
-#endif
-
+asm (".include \"core/minute-ia/irq_handler_common.S\"");
 
 struct irq_data {
 	void (*routine)(void);
+	void (*ioapic_routine)(void);
 	int irq;
 };
 
@@ -55,43 +31,28 @@ struct irq_data {
  * Note: currently we don't allow nested irq handling
  */
 #define DECLARE_IRQ(irq, routine) DECLARE_IRQ_(irq, routine, irq + 32 + 10)
-/* Each irq has a irq_data structure placed in .rodata.irqs section,
- * to be used for dynamically setting up interrupt gates */
-#define DECLARE_IRQ_(irq, routine, vector)				\
-	void __keep routine(void);					\
-	void IRQ_HANDLER(irq)(void); 					\
-	__asm__ (".section .rodata.irqs\n");				\
-	const struct irq_data __keep CONCAT4(__irq_, irq, _, routine)	\
-	__attribute__((section(".rodata.irqs")))= {IRQ_HANDLER(irq), irq};\
-	__asm__ (							\
-		".section .text._irq_"#irq"_handler\n"			\
-		"_irq_"#irq"_handler:\n"				\
-			"pusha\n"					\
-			ASM_LOCK_PREFIX "addl  $1, __in_isr\n"		\
-			"movl %esp, %eax\n"                             \
-			"movl $stack_end, %esp\n"                       \
-			"push %eax\n"                                   \
-			task_start_irq_handler_call(vector)		\
-			"call "#routine"\n"				\
-			"push $0\n"					\
-			"push $0\n"					\
-			"call switch_handler\n"				\
-			"addl $0x08, %esp\n"				\
-			"pop %esp\n"                                    \
-			"test %eax, %eax\n"				\
-			"je 1f\n"					\
-			"movl current_task, %eax\n"			\
-			save_fpu_ctx 					\
-			"movl %esp, (%eax)\n"				\
-			"movl next_task, %eax\n"			\
-			"movl %eax, current_task\n"			\
-			"movl (%eax), %esp\n"				\
-			rstr_fpu_ctx					\
-			"1:\n"						\
-			"movl $"#vector ", (0xFEC00040)\n"              \
-			"movl $0x00, (0xFEE000B0)\n" 			\
-			ASM_LOCK_PREFIX "subl  $1, __in_isr\n"		\
-			"popa\n"					\
-			"iret\n"					\
+/*
+ * Each irq has a irq_data structure placed in .rodata.irqs section,
+ * to be used for dynamically setting up interrupt gates
+ */
+#define DECLARE_IRQ_(irq, routine, vector)				       \
+	void __keep routine(void);					       \
+	void IRQ_HANDLER(irq)(void);					       \
+	__asm__ (".section .rodata.irqs\n");				       \
+	const struct irq_data __keep CONCAT4(__irq_, irq, _, routine)	       \
+	__attribute__((section(".rodata.irqs"))) = { routine,		       \
+						     IRQ_HANDLER(irq),	       \
+						     irq};		       \
+	__asm__ (							       \
+		".section .text._irq_"#irq"_handler\n"			       \
+		"_irq_"#irq"_handler:\n"				       \
+			"pusha\n"					       \
+			ASM_LOCK_PREFIX "addl  $1, __in_isr\n"		       \
+			"irq_handler_common $0 $0 $"#irq"\n"		       \
+			"movl $"#vector ", " STRINGIFY(IOAPIC_EOI_REG) "\n"    \
+			"movl $0x00, " STRINGIFY(LAPIC_EOI_REG) "\n"	       \
+			ASM_LOCK_PREFIX "subl  $1, __in_isr\n"		       \
+			"popa\n"					       \
+			"iret\n"					       \
 		);
 #endif  /* __CROS_EC_IRQ_HANDLER_H */