diff options
author | Jaiber John <jaiber.j.john@intel.com> | 2016-03-31 23:34:34 +0530 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2016-08-10 20:07:36 -0700 |
commit | a625b710c3e4d64a659ae20682b85dd552657b6c (patch) | |
tree | 88099f69bde18a59b4647e0fa1c0f09136ddb0cf /core/minute-ia/switch.S | |
parent | d54387c18e20f5973ae62fdc7f8a95872b52f4f5 (diff) | |
download | chrome-ec-a625b710c3e4d64a659ae20682b85dd552657b6c.tar.gz |
minute-ia: Enable x86 core for Intel ISH
Add intial minute-IA (x86) core to to enable the FW
to boot on Intel Integrated Sensor Hub (ISH).
BUG=chrome-os-partner:51851
BRANCH=None
TEST=`make buildall -j`
Change-Id: I4dcf841766f216cd00fb1d4214fae19ba5de5603
Signed-off-by: Jaiber John <jaiber.j.john@intel.com>
Signed-off-by: Alex Brill <alexander.brill@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/336443
Commit-Ready: Raj Mojumder <raj.mojumder@intel.com>
Tested-by: Raj Mojumder <raj.mojumder@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'core/minute-ia/switch.S')
-rw-r--r-- | core/minute-ia/switch.S | 110 |
1 files changed, 110 insertions, 0 deletions
diff --git a/core/minute-ia/switch.S b/core/minute-ia/switch.S new file mode 100644 index 0000000000..94650a880e --- /dev/null +++ b/core/minute-ia/switch.S @@ -0,0 +1,110 @@ +/* Copyright (c) 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * x86 task swtching and interrupt handling + */ + +#include "config.h" +#include "registers.h" +#include "task_defs.h" + +.text + +.extern current_task +.extern next_task + +.global __task_start +.global __switchto +.global default_int_handler + +# Start the task scheduling. Start current_task (hook_task) +# This function is not an ISR but imitates the sequence. +.align 4 +.func __task_start +__task_start: + movl current_task, %eax + movl (%eax), %esp + popa + iret +.endfunc + +# Default interrupt handler - to handle exceptions +# and prints error +.align 4 +.func default_int_handler +default_int_handler: + + pusha + add $1, __in_isr + + call unhandled_vector # Handle system interrupts and + # unregistered user interrupts + + cmpl $LAPIC_SPURIOUS_INT_VECTOR, %eax + je 1f # No EOI for LAPIC_SPURIOUS_INT_VECTOR + + movl %eax, IOAPIC_EOI_REG # Indicate completion of servicing the + # interrupt to IOAPIC first + sub $1, __in_isr + movl $0x00, LAPIC_EOI_REG # Indicate completion of servicing the + # interrupt to LAPIC next + 1: + popa + iret + +.endfunc + +# Switches from one task to another if ready. +# __schedule triggeres software interrupt ISH_TS_VECTOR, which is handled by +# __switchto +.align 4 +.func __switchto +__switchto: + + # Save current task + pusha + addl $1, __in_isr + + # __schedule() copies 'resched' to %ecx and 'desched' to %edx before + # triggering ISH_TS_VECTOR + # + # Push %ecx and %edx into stack to pass them as function parameters + # to switch_handler(desched, resched) + + push %ecx + push %edx + call switch_handler + addl $0x8, %esp # Clean up stack + + test %eax, %eax # Check if task switch required + jz 1f + + movl current_task, %eax + +#ifdef CONFIG_FPU + fnsave 20(%eax) # Save current FPU context at current->fp_ctx +#endif + + # Save SP of current task and switch to new task + movl %esp, (%eax) + movl next_task, %eax + movl %eax, current_task + movl (%eax), %esp + +#ifdef CONFIG_FPU + frstor 20(%eax) # Restore next FPU context +#endif + + 1: + subl $1, __in_isr + + # Indicate completion of servicing the interrupt to LAPIC. + # No IOAPIC EOI needed as this is SW triggered. + movl $0x00, LAPIC_EOI_REG + + # Restore general purpose registers. + popa + iret + +.endfunc |