it8380dev: modify hwtimer and LPC wake up

1. In combinational mode and clock source is 8MHz,
   if timer 3 counter register always equals to 7, then timer 4 will be a
   32-bit MHz free-running counter.
2. Fix TIMER_32P768K_CNT_TO_US(), each count should be 30.5175 us,
   not 32.768us.
3. Fix TIMER_CNT_8M_32P768K().
4. Make sure LPC wake up interrupt is enabled before entering doze /
   deep doze mode.

Signed-off-by: Dino Li <dino.li@ite.com.tw>

BRANCH=none
BUG=none
TEST=1. Console commands: 'gettime', 'timerinfo', 'waitms', and 'forcetime'.
     2. Enabled Hook debug, no warning message received (48hrs).
     3. Tested ectool command 'version' x 2000.

Change-Id: I796d985361d3c18bc5813c58705b41923e28c5b1
Reviewed-on: https://chromium-review.googlesource.com/310039
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>

1 files changed, 7 insertions, 34 deletions

diff --git a/core/nds32/task.c b/core/nds32/task.c
index 79880e059d..3075fe05c6 100644
--- a/core/nds32/task.c
+++ b/core/nds32/task.c
@@ -60,10 +60,6 @@ static uint64_t exc_total_time;  /* Total time in exceptions */
 static uint32_t svc_calls;       /* Number of service calls */
 static uint32_t task_switches;   /* Number of times active task changed */
 static uint32_t irq_dist[CONFIG_IRQ_COUNT];  /* Distribution of IRQ calls */
-#if defined(CONFIG_LOW_POWER_IDLE) && defined(CHIP_FAMILY_IT83XX)
-static uint32_t exc_current_fth;
-static uint32_t exc_current_ftl;
-#endif
 #endif
 
 extern int __task_start(void);
@@ -79,22 +75,9 @@ void __idle(void)
 	 */
 	cprints(CC_TASK, "idle task started");
 
-#if defined(CONFIG_LPC) && defined(CONFIG_IT83XX_LPC_ACCESS_INT)
-	IT83XX_WUC_WUESR4 = 0xff;
-	task_clear_pending_irq(IT83XX_IRQ_WKINTAD);
-	/* bit2, wake-up enable for LPC access */
-	IT83XX_WUC_WUENR4 |= (1 << 2);
-#endif
-
 	while (1) {
-#if defined(CONFIG_LPC) && defined(CONFIG_IT83XX_LPC_ACCESS_INT)
-		BRAM_LPC_ACCESS = LPC_ACCESS_INT_BUSY;
-		/* LPC access interrupt pending. */
-		if (IT83XX_WUC_WUESR4 & (1 << 2)) {
-			task_enable_irq(IT83XX_IRQ_WKINTAD);
-			continue;
-		}
-		BRAM_LPC_ACCESS = 0x00;
+#if defined(CHIP_FAMILY_IT83XX) && defined(CONFIG_LPC) \
+	&& defined(CONFIG_IT83XX_LPC_ACCESS_INT)
 		task_enable_irq(IT83XX_IRQ_WKINTAD);
 #endif
 
@@ -108,6 +91,11 @@ void __idle(void)
 		 * (sleep / deep sleep, depending on chip config).
 		 */
 		asm("standby wake_grant");
+
+#if defined(CHIP_FAMILY_IT83XX) && defined(CONFIG_LPC) \
+	&& defined(CONFIG_IT83XX_LPC_ACCESS_INT)
+		task_disable_irq(IT83XX_IRQ_WKINTAD);
+#endif
 	}
 }
 #endif /* !CONFIG_LOW_POWER_IDLE */
@@ -349,10 +337,6 @@ void update_exc_start_time(void)
 {
 #ifdef CONFIG_TASK_PROFILING
 	exc_start_time = get_time().val;
-#if defined(CONFIG_LOW_POWER_IDLE) && defined(CHIP_FAMILY_IT83XX)
-	exc_current_fth = IT83XX_ETWD_ETXCNTOR(FREE_EXT_TIMER_H);
-	exc_current_ftl = IT83XX_ETWD_ETXCNTOR(FREE_EXT_TIMER_L);
-#endif
 #endif
 }
 
@@ -390,10 +374,6 @@ void end_irq_handler(void)
 {
 #ifdef CONFIG_TASK_PROFILING
 	uint64_t t, p;
-
-#if defined(CONFIG_LOW_POWER_IDLE) && defined(CHIP_FAMILY_IT83XX)
-	uint32_t c;
-#endif
 	/*
 	 * save r0 and fp (fp for restore r0-r5, r15, fp, lp and sp
 	 * while interrupt exit.
@@ -401,13 +381,6 @@ void end_irq_handler(void)
 	asm volatile ("smw.adm $r0, [$sp], $r0, 8");
 
 	t = get_time().val;
-#if defined(CONFIG_LOW_POWER_IDLE) && defined(CHIP_FAMILY_IT83XX)
-	if (exc_current_fth != IT83XX_ETWD_ETXCNTOR(FREE_EXT_TIMER_H)) {
-		c = (IT83XX_ETWD_ETXCNTLR(FREE_EXT_TIMER_L) + exc_current_ftl) -
-			IT83XX_ETWD_ETXCNTOR(FREE_EXT_TIMER_L);
-		t = exc_start_time + (c >> TIMER_COUNT_1US_SHIFT);
-	}
-#endif
 	p = t - exc_start_time;
 
 	exc_total_time += p;