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| author | Keith Short <keithshort@chromium.org> | 2020-07-19 16:23:23 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-08-13 14:26:53 +0000 |
| commit | e0bf946ced052fe5e857b42da666ba252b03da95 (patch) | |
| tree | d5218c56b92ecf3e27e62af0a19c8e9d34443134 /core/nds32 | |
| parent | 8ce0c16cc2d153b0002fbea64d08c09d98c3835f (diff) | |
| download | chrome-ec-e0bf946ced052fe5e857b42da666ba252b03da95.tar.gz | |
npcx: add support for rom resident sections
EC images are copied in full from flash to RAM. When the code RAM size
is smaller than 1/2 the flash size, the EC image size is limited to the
code RAM size, leaving unused flash space.
Create a new linker section .init_rom used to store data objects that
are single use in the previously unused flash area. Data objects can be
used at runtime by copying into RAM using the flash_read() function.
This change is tied to the NPCX flash layout, with asserts to ensure
builds fail if the CONFIG_CHIP_INIT_ROM_REGION is not supported by
the chip.
CLs that enable CONFIG_CHIP_INIT_ROM_REGION should not be merged until
the predecessor CL:2325764 is available in CPFE images.
BUG=b:160330682
BRANCH=none
TEST=make buildall
TEST=With debug code, use the _init_rom macro and validate the data can
be read using flash_read().
TEST=Using hex editor, verify .init_rom section located at 192K boundary
and unused bytes are filled with 0xFF.
TEST=compare_build.sh passes when run against waddledoo (npcx, cortex-m)
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ia0785798fd1938ad6a1c254a070b219027ee82a3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311268
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'core/nds32')
| -rw-r--r-- | core/nds32/ec.lds.S | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/core/nds32/ec.lds.S b/core/nds32/ec.lds.S index 24ee1ef0ae..ae26e58f7b 100644 --- a/core/nds32/ec.lds.S +++ b/core/nds32/ec.lds.S @@ -188,6 +188,19 @@ SECTIONS . = ALIGN(4); *(.rodata*) +#ifdef CONFIG_CHIP_INIT_ROM_REGION + ASSERT(0, "CONFIG_CHIP_INIT_ROM_REGION not supported by linker script") +#endif /* CONFIG_CHIP_INIT_ROM_REGION */ + /* + * This linker file does not yet support a separate ROM resident + * section. Ensure the corresponding data objects are linked + * into the .rodata section. + */ + . = ALIGN(4); + __init_rom_start = .; + *(.init.rom) + __init_rom_end = .; + #if defined(SECTION_IS_RO) && defined(CONFIG_FLASH) . = ALIGN(64); KEEP(*(.google)) |