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author | Dino Li <Dino.Li@ite.com.tw> | 2021-08-23 13:28:38 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-08-23 10:40:09 +0000 |
commit | 5a6406cf2ec23b0c28dfd8bb8d1db4edb810ebcf (patch) | |
tree | 0e728b77daad74f05c4c16c00c6ca04237f409a3 /core | |
parent | cf83cad7be2746b8a177206cdd20e3854620e6d6 (diff) | |
download | chrome-ec-5a6406cf2ec23b0c28dfd8bb8d1db4edb810ebcf.tar.gz |
riscv: panic: S0/S1 are clobbered registers in software_panic()
So compiler won't use these two registers to store any other value
in the function. This fixed software panic info isn't correct issue
when LTO is enabled.
BRANCH=asurada
BUG=b:179206540
TEST=Run "crash assert" on hayato, the software panic info is correct.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: I4a94e7ea94ebc0bf4f056de58edb66c2962d669d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3113485
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Diffstat (limited to 'core')
-rw-r--r-- | core/riscv-rv32i/panic.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/core/riscv-rv32i/panic.c b/core/riscv-rv32i/panic.c index 3d8cec1b06..b339fdf76c 100644 --- a/core/riscv-rv32i/panic.c +++ b/core/riscv-rv32i/panic.c @@ -41,8 +41,8 @@ static const char * const exc_type[16] = { void software_panic(uint32_t reason, uint32_t info) { - asm volatile ("mv s0, %0" : : "r"(reason)); - asm volatile ("mv s1, %0" : : "r"(info)); + asm volatile ("mv s0, %0" : : "r"(reason) : "s0"); + asm volatile ("mv s1, %0" : : "r"(info) : "s1"); if (in_interrupt_context()) asm("j excep_handler"); else |