summaryrefslogtreecommitdiff
path: root/core
diff options
context:
space:
mode:
authorTzung-Bi Shih <tzungbi@chromium.org>2020-11-11 13:11:20 +0800
committerCommit Bot <commit-bot@chromium.org>2020-11-19 08:53:29 +0000
commit87613f3e9bf22d8d420ea5667b750ea4fb6d5c6b (patch)
tree95da70602f31e89f1c3719eb2ed594b7f4550817 /core
parentf4fb44573738fcbc393b5d16c90ccf9d570480b0 (diff)
downloadchrome-ec-87613f3e9bf22d8d420ea5667b750ea4fb6d5c6b.tar.gz
core/riscv-rv32i: support DRAM cache
Allocates memory space for dram.* sections. BRANCH=none BUG=b:156222459 TEST=make BOARD=asurada_scp Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Change-Id: I0825c9daf06d88929ef3410a14c176099bfa1ace Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2531753 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Diffstat (limited to 'core')
-rw-r--r--core/riscv-rv32i/ec.lds.S64
1 files changed, 64 insertions, 0 deletions
diff --git a/core/riscv-rv32i/ec.lds.S b/core/riscv-rv32i/ec.lds.S
index 1a979ddcaa..c9de979d78 100644
--- a/core/riscv-rv32i/ec.lds.S
+++ b/core/riscv-rv32i/ec.lds.S
@@ -47,6 +47,10 @@ MEMORY
#else
IRAM (rw) : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE
#endif /* CHIP_FAMILY_IT8XXX2 */
+
+#ifdef CONFIG_DRAM_BASE
+ DRAM (rwx) : ORIGIN = CONFIG_DRAM_BASE, LENGTH = CONFIG_DRAM_SIZE
+#endif
}
SECTIONS
@@ -359,6 +363,66 @@ SECTIONS
#endif
#endif /* CHIP_FAMILY_IT8XXX2 */
+#ifdef CONFIG_DRAM_BASE
+ /*
+ * Sections in DRAM region are constructed as like in non-DRAM regions:
+ * .dram.data LMA is for preserving initialized data across resets.
+ * The only difference is that they are all in the DRAM region:
+ * .dram.text | LOAD
+ * .dram.rodata | LOAD
+ * .dram.data LMA | LOAD
+ * .dram.data VMA |
+ * .dram.bss | NOLOAD
+ */
+
+ .dram.text : {
+ . = ALIGN(4);
+ KEEP(*(SORT(.dram.text.keep.*)))
+ *(SORT(.dram.text.*))
+ . = ALIGN(4);
+ } > DRAM
+
+ .dram.rodata : {
+ . = ALIGN(4);
+ KEEP(*(SORT(.dram.rodata.keep.*)))
+ *(SORT(.dram.rodata.*))
+ . = ALIGN(4);
+ } > DRAM
+
+ __dram_data_lma_start = ADDR(.dram.rodata) + SIZEOF(.dram.rodata);
+
+ /* Place .dram.data LMA in between .dram.rodata and .dram.data VMA. */
+ .dram.data __dram_data_lma_start +
+ (__dram_data_end - __dram_data_start) : {
+ . = ALIGN(4);
+ __dram_data_start = .;
+ *(.dram.data*)
+ . = ALIGN(4);
+ __dram_data_end = .;
+
+ /*
+ * Normally, '> DRAM AT > DRAM' should be the same as '> DRAM',
+ * and they will be at the same address. However, if the address
+ * of VMA specified, LMA and VMA might have different addresses:
+ * '> DRAM' places VMA at the address where section declaration
+ * specified.
+ * 'AT > DRAM' places LMA at the location counter's address.
+ */
+ } > DRAM AT > DRAM
+
+ /*
+ * ld assigns correct attribute for .bss, but not for other .*.bss,
+ * we need an explicltly NOLOAD.
+ */
+ .dram.bss(NOLOAD) : {
+ . = ALIGN(4);
+ __dram_bss_start = .;
+ *(SORT(.dram.bss*))
+ . = ALIGN(4);
+ __dram_bss_end = .;
+ } > DRAM
+#endif /* CONFIG_DRAM_BASE */
+
#if !(defined(SECTION_IS_RO) && defined(CONFIG_FLASH))
/DISCARD/ : { *(.google) }
#endif