diff options
| author | Tzung-Bi Shih <tzungbi@chromium.org> | 2020-06-03 17:07:36 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-06-04 10:27:45 +0000 |
| commit | 70b5e19854a10a08093b8dde0b0c129db912e478 (patch) | |
| tree | e44142a5baca03448a1ed4e3c4ad81c943bbff37 /core | |
| parent | f1f7872295a508c4a4c9aad6e1640556466ff7a7 (diff) | |
| download | chrome-ec-70b5e19854a10a08093b8dde0b0c129db912e478.tar.gz | |
core/riscv-rv32i: remove return values
Return values of chip_enable_irq(), chip_disable_irq(), and
chip_clear_pending_irq() are not using. Removes them.
BRANCH=none
BUG=b:146213943
BUG=b:157521370
TEST=1. make BOARD=asurada
2. flash_ec --board=asurada --image build/asurada/ec.bin
3. (EC console)> version
Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org>
Change-Id: Ic7e3e80483f76f35bfe7781ddea48515ab8e3361
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2227778
Reviewed-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'core')
| -rw-r--r-- | core/nds32/irq_chip.h | 9 | ||||
| -rw-r--r-- | core/riscv-rv32i/irq_chip.h | 9 |
2 files changed, 6 insertions, 12 deletions
diff --git a/core/nds32/irq_chip.h b/core/nds32/irq_chip.h index 8c9b04f395..ca517558b3 100644 --- a/core/nds32/irq_chip.h +++ b/core/nds32/irq_chip.h @@ -12,23 +12,20 @@ * Enable an IRQ in the chip interrupt controller. * * @param irq interrupt request index. - * @return CPU interrupt number to enable if any, -1 else. */ -int chip_enable_irq(int irq); +void chip_enable_irq(int irq); /** * Disable an IRQ in the chip interrupt controller. * * @param irq interrupt request index. - * @return CPU interrupt number to disable if any, -1 else. */ -int chip_disable_irq(int irq); +void chip_disable_irq(int irq); /** * Clear a pending IRQ in the chip interrupt controller. * * @param irq interrupt request index. - * @return CPU interrupt number to clear if any, -1 else. * * Note that most interrupts can be removed from the pending state simply by * handling whatever caused the interrupt in the first place. This only needs @@ -36,7 +33,7 @@ int chip_disable_irq(int irq); * reason for the interrupt, and then the interrupt is re-enabled from a * different context. */ -int chip_clear_pending_irq(int irq); +void chip_clear_pending_irq(int irq); /** * Software-trigger an IRQ in the chip interrupt controller. diff --git a/core/riscv-rv32i/irq_chip.h b/core/riscv-rv32i/irq_chip.h index 6841f1993a..45cabf346e 100644 --- a/core/riscv-rv32i/irq_chip.h +++ b/core/riscv-rv32i/irq_chip.h @@ -12,23 +12,20 @@ * Enable an IRQ in the chip interrupt controller. * * @param irq interrupt request index. - * @return CPU interrupt number to enable if any, -1 else. */ -int chip_enable_irq(int irq); +void chip_enable_irq(int irq); /** * Disable an IRQ in the chip interrupt controller. * * @param irq interrupt request index. - * @return CPU interrupt number to disable if any, -1 else. */ -int chip_disable_irq(int irq); +void chip_disable_irq(int irq); /** * Clear a pending IRQ in the chip interrupt controller. * * @param irq interrupt request index. - * @return CPU interrupt number to clear if any, -1 else. * * Note that most interrupts can be removed from the pending state simply by * handling whatever caused the interrupt in the first place. This only needs @@ -36,7 +33,7 @@ int chip_disable_irq(int irq); * reason for the interrupt, and then the interrupt is re-enabled from a * different context. */ -int chip_clear_pending_irq(int irq); +void chip_clear_pending_irq(int irq); /** * Software-trigger an IRQ in the chip interrupt controller. |