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| author | Dino Li <Dino.Li@ite.com.tw> | 2018-05-21 17:15:56 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-05-22 09:49:33 -0700 |
| commit | 3423505535e3eb0546644337ff8938e28231a90a (patch) | |
| tree | f9e86745e9744fb332400d993177f62cbb983a78 /core | |
| parent | efcd71e07544760605f5c194bf5fdc92965c6d97 (diff) | |
| download | chrome-ec-3423505535e3eb0546644337ff8938e28231a90a.tar.gz | |
it83xx: watchdog: print LP on watchdog warning
It's difficult to debug problems with single watchdog warning.
This patch will print IPC and LP registers continually if watchdog
warning is fired.
BRANCH=None
BUG=b:79733639
TEST=waitms 1000, EC print warning message but no reset.
waitms 3000, EC print warning message and then reset.
On bip, EC is powered by servo only. And we got the following
watchdog warning message:
And we refer to assembly code, the IPC indicates CPU is executing
instructions in "gpio_get_level()"
(IPC:00002408, IPC:00002404, IPC:000023fc, IPC:0000240e),
and calling from "chipset_pre_init_callback()" (LP:0000101e).
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002404 LP:0000101e
Pre-WDT warning! IPC:000023fc LP:0000101e
Pre-WDT warning! IPC:0000240e LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Change-Id: I9e9429806db448624a10c348bee9c6e3d0a7765b
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1060937
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'core')
| -rw-r--r-- | core/nds32/cpu.h | 2 | ||||
| -rw-r--r-- | core/nds32/init.S | 2 | ||||
| -rw-r--r-- | core/nds32/task.c | 6 |
3 files changed, 10 insertions, 0 deletions
diff --git a/core/nds32/cpu.h b/core/nds32/cpu.h index 2246ec7f77..dcf668bd24 100644 --- a/core/nds32/cpu.h +++ b/core/nds32/cpu.h @@ -54,4 +54,6 @@ static inline uint32_t get_itype(void) /* Generic CPU core initialization */ void cpu_init(void); +extern uint32_t ilp; + #endif /* __CROS_EC_CPU_H */ diff --git a/core/nds32/init.S b/core/nds32/init.S index 2ee7815908..d13eeb3a57 100644 --- a/core/nds32/init.S +++ b/core/nds32/init.S @@ -20,6 +20,8 @@ __entry_\()\name: smw.adm $r15, [$sp], $r15, 0xb /* r0-r5 are caller saved */ smw.adm $r0, [$sp], $r5, 0 + /* store link pointer register */ + swi.gp $lp, [ + ilp] /* switch to system stack if we are called from process stack */ la $r3, stack_end mov55 $fp, $sp diff --git a/core/nds32/task.c b/core/nds32/task.c index 17f02cd10e..9a77114651 100644 --- a/core/nds32/task.c +++ b/core/nds32/task.c @@ -174,6 +174,12 @@ static int sw_int_num; /* Number of CPU hardware interrupts (HW0 ~ HW15) */ int cpu_int_entry_number; +/* + * This variable is used to save link pointer register, + * and it is updated at the beginning of each ISR. + */ +uint32_t ilp; + static inline task_ *__task_id_to_ptr(task_id_t id) { return tasks + id; |