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| author | CHLin <CHLin56@nuvoton.com> | 2020-09-28 10:19:43 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-10-05 10:07:41 +0000 |
| commit | e6ca724f8b5e15a18bccf14c5905b3f1d8baf7c2 (patch) | |
| tree | b69ce7c30a19297c151202a977ff317f8a5c8666 /core | |
| parent | fe6577ffb515ef35af32a109e2b0832ea6a24018 (diff) | |
| download | chrome-ec-e6ca724f8b5e15a18bccf14c5905b3f1d8baf7c2.tar.gz | |
npcx: support enhanced PSL functions in npcx9
1. In npcx7, the PSL (hibernation) wakeup source only can come from
physical PSL_IN pins. In npcx9, the LCT (Long Countdown Timer)
module is introduced to support wakeup from a configurable timeout.
2. support PSL wakeup from the VCC1_RST pin. This function is disabled
by default and enabled (and locked) in the firmware in the npcx9 A1
chip. In the npcx9 A2 chip, this function is enabled (and locked)
by booter.
3. Support pulse mode and open drain (if pulse mode is enabled) for
PSL_OUT pin.
4. support one PSL general-purpose output pin which is powered by VSBY.
BRANCH=none
BUG=b:165777478
TEST=pass "make buildall"
TEST="hibernate 10", check EC wakes up from hibernate after 10 seconds.
make sure the reset cause in the console is "power-on hibernate
rtc-alarm"
TEST="hibernate"; check EC wakes up from hibernate after pressing
VCC1_RST button on the internal test board.
Test=configure the PSL_OUT to pulse mode and "hibernate"; cut off VCC1
power; check EC can wake up from hibernate with any input event.
Test=configure the level of PSL_GPO before hibernation; check the level
is kept after entering hibernation.
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Signed-off-by: CHLin <CHLin56@nuvoton.com>
Change-Id: I98ad41da8557222cf3d09fef9524880731cecde1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435164
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
Diffstat (limited to 'core')
| -rw-r--r-- | core/cortex-m/ec.lds.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S index 2314156294..fc24d181b5 100644 --- a/core/cortex-m/ec.lds.S +++ b/core/cortex-m/ec.lds.S @@ -161,7 +161,7 @@ SECTIONS . = ALIGN(4); STRINGIFY(OUTDIR/core/CORE/init.o) (.text) -#if defined(CHIP_FAMILY_NPCX7) && !defined(CONFIG_HIBERNATE_PSL) +#if NPCX_FAMILY_VERSION >= NPCX_FAMILY_NPCX7 && !defined(CONFIG_HIBERNATE_PSL) /* Keep hibernate utility in last code ram block */ . = ALIGN(4); KEEP(*(.after_init)) |